5秒后页面跳转
CDC305N PDF预览

CDC305N

更新时间: 2024-11-17 21:54:19
品牌 Logo 应用领域
德州仪器 - TI 时钟驱动器逻辑集成电路光电二极管
页数 文件大小 规格书
7页 114K
描述
OCTAL DIVIDE-BY-2 CIRCUIT/CLOCK DRIVER

CDC305N 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:DIP
包装说明:0.300 INCH, PLASTIC, DIP-16针数:16
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.92Is Samacsys:N
系列:305输入调节:STANDARD
JESD-30 代码:R-PDIP-T16长度:19.305 mm
逻辑集成电路类型:LOW SKEW CLOCK DRIVER最大I(ol):0.048 A
功能数量:1反相输出次数:4
端子数量:16实输出次数:4
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP16,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 VProp。Delay @ Nom-Sup:9 ns
传播延迟(tpd):9 ns认证状态:Not Qualified
Same Edge Skew-Max(tskwd):1.5 ns座面最大高度:5.08 mm
子类别:Clock Drivers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:TTL
温度等级:COMMERCIAL端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.62 mm
最小 fmax:80 MHzBase Number Matches:1

CDC305N 数据手册

 浏览型号CDC305N的Datasheet PDF文件第2页浏览型号CDC305N的Datasheet PDF文件第3页浏览型号CDC305N的Datasheet PDF文件第4页浏览型号CDC305N的Datasheet PDF文件第5页浏览型号CDC305N的Datasheet PDF文件第6页浏览型号CDC305N的Datasheet PDF文件第7页 
CDC305  
OCTAL DIVIDE-BY-2 CIRCUIT/CLOCK DRIVER  
SCAS326A – JUNE 1990 – REVISED NOVEMBER 1995  
D OR N PACKAGE  
(TOP VIEW)  
Replaces SN74AS305  
Maximum Output Skew of 1 ns  
Maximum Pulse Skew of 1ns  
TTL-Compatible Inputs and Outputs  
Q2  
Q3  
Q4  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
Q1  
CLR  
V
V
CLK  
PRE  
Q8  
GND  
GND  
GND  
Q5  
Q6  
Q7  
Center-Pin V  
Minimize High-Speed Switching Noise  
and GND Configurations  
CC  
CC  
CC  
Package Options Include Plastic  
Small-Outline (D) Package and Standard  
Plastic (N) 300-mil DIPs  
description  
The CDC305 contains eight flip-flops designed to have low skew between outputs. The eight outputs (four  
in-phase with CLK and four out-of-phase) toggle on successive CLK pulses. Preset (PRE) and clear (CLR)  
inputs are provided to set the Q and Q outputs high or low independent of the clock (CLK) input.  
The CDC305 has output and pulse-skew parameters t  
when a divide-by-two function is required.  
and t  
to ensure performance as a clock driver  
sk(o)  
sk(p)  
The CDC305 is characterized for operation from 0°C to 70°C.  
FUNCTION TABLE  
INPUTS  
OUTPUTS  
CLR  
L
PRE  
H
CLK Q1Q4 Q5Q8  
X
X
X
L
L
H
L
H
L
H
L
L
L
L
H
H
Q
Q
Q
Q
0
0
0
0
H
H
This configuration does not persist when  
PRE or CLR returns to its inactive (high)  
level.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1995, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

与CDC305N相关器件

型号 品牌 获取价格 描述 数据表
CDC318 TI

获取价格

1-LINE TO 18-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE
CDC318A TI

获取价格

1-LINE TO 18-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE
CDC318ADL TI

获取价格

1-LINE TO 18-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE
CDC318ADLG4 TI

获取价格

具有 I2C 控制接口的 1 线路至 18 线路时钟驱动器 | DL | 48 | 0 t
CDC318ADLR TI

获取价格

具有 I2C 控制接口的 1 线路至 18 线路时钟驱动器 | DL | 48 | 0 t
CDC318ADLRG4 TI

获取价格

具有 I2C 控制接口的 1 线路至 18 线路时钟驱动器 | DL | 48 | 0 t
CDC318DL TI

获取价格

1-LINE TO 18-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE
CDC318DLR TI

获取价格

1-LINE TO 18-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE
CDC319 TI

获取价格

1-LINE TO 10-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE
CDC319DB TI

获取价格

1-LINE TO 10-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE