CDC319

更新时间： 2024-11-17 22:40:11

品牌	Logo	应用领域
德州仪器 - TI		时钟驱动器
页数	文件大小	规格书
11页	170K
描述
1-LINE TO 10-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE

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CDC319 数据手册

CDC319

1-LINE TO 10-LINE CLOCK DRIVER

WITH I C CONTROL INTERFACE

SCAS590 – DECEMBER 1997

DB PACKAGE

(TOP VIEW)

High-Speed, Low-Skew 1-to-10 Clock Buffer

for SDRAM (Synchronous DRAM) Clock

Buffering Applications

1Y0

1Y1

GND

1Y2

1Y3

GND

Output Skew, t

, Less Than 250 ps

sk(o)

2Y3

2Y2

GND

Pulse Skew, t

, Less Than 500 ps

sk(p)

Supports up to Two Unbuffered SDRAM

DIMMs (Dual Inline Memory Modules)

2Y1

2Y0

GND

I C Serial Interface Provides Individual

Enable Control for Each Output

Operates at 3.3 V

3Y0

GND

Distributed V

Switching Noise

and Ground Pins Reduce

3Y1

GND

SCLOCK

ESD Protection Exceeds 2000 V Per

MIL-STD-883, Method 3015

SDATA

Packaged in 28-Pin Shrink Small Outline

(DB) Package

description

The CDC319 is a high-performance clock buffer that distributes one input (A) to 10 outputs (Y) with minimum

skew for clock distribution. The CDC319 operates from a 3.3-V power supply, and is characterized for operation

from 0°C to 70°C.

The device provides a standard mode (100K-bits/s) I C serial interface for device control. The implementation

is as a slave/receiver. The device address is specified in the I C device address table. Both of the I C inputs

(SDATA and SCLOCK) provide integrated pullup resistors (typically 140 kΩ) and are 5-V tolerant.

Three 8-bit I C registers provide individual enable control for each of the outputs. All outputs default to enabled

at powerup. Each output can be placed in a disabled mode with a low-level output when a low-level control bit

is written to the control register. The registers are write only and must be accessed in sequential order (i.e.,

random access of the registers is not supported).

The CDC319 provides 3-state outputs for testing and debugging purposes. The outputs can be placed in a

high-impedance state via the output-enable (OE) input. When OE is high, all outputs are in the operational state.

When OE is low, the outputs are placed in a high-impedance state. OE provides an integrated pullup resistor.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Intel is a trademark of Intel Corporation

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6 7...11

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与CDC319相关器件

型号	品牌	获取价格	描述	数据表
CDC319DB	TI	获取价格	1-LINE TO 10-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE
CDC319DBG4	TI	获取价格	1-Line to 10-Line Clock Driver with I<sup>2</sup>C Control Interface 28-SSOP 0
CDC319DBLE	ETC	获取价格	Ten Distributed-Output Clock Driver
CDC319DBR	TI	获取价格	1Line to 10Line Clock Driver
CDC3205G-A	TDK	获取价格	Microcontroller,
CDC3205G-B	TDK	获取价格	Microcontroller, 32-Bit, ARM7 CPU, 50MHz, CMOS, CPGA257,
CDC3207G	MICRONAS	获取价格	CDC 3207G ARM7-Based Car Dashboard Controller
CDC3207G-B	TDK	获取价格	Microcontroller, 32-Bit, FLASH, ARM7 CPU, 50MHz, CMOS, PQFP128
CDC3207G-CQK	TDK	获取价格	Microcontroller, 32-Bit, 50MHz, CMOS, PQFP128, PLASTIC, QFP-128
CDC3217G	MICRONAS	获取价格	CDC 3217G ARM7-Based Car Dashboard Controller

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