5秒后页面跳转
CDC2351MDBREPG4 PDF预览

CDC2351MDBREPG4

更新时间: 2024-11-20 12:55:11
品牌 Logo 应用领域
德州仪器 - TI 时钟驱动器输出元件
页数 文件大小 规格书
10页 451K
描述
1-LINE TO 10-LINE CLOCK DRIVER WITH 3-STATE OUTPUTS

CDC2351MDBREPG4 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SSOP
包装说明:SSOP, SSOP24,.3针数:24
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.32系列:2351
输入调节:STANDARDJESD-30 代码:R-PDSO-G24
JESD-609代码:e4长度:8.2 mm
逻辑集成电路类型:LOW SKEW CLOCK DRIVER最大I(ol):0.012 A
湿度敏感等级:2功能数量:1
反相输出次数:端子数量:24
实输出次数:10最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE WITH SERIES RESISTOR
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装等效代码:SSOP24,.3封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:3.3 VProp。Delay @ Nom-Sup:11 ns
传播延迟(tpd):11 ns认证状态:Not Qualified
Same Edge Skew-Max(tskwd):2.5 ns座面最大高度:2 mm
子类别:Clock Drivers最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:BICMOS
温度等级:MILITARY端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:5.3 mm最小 fmax:100 MHz

CDC2351MDBREPG4 数据手册

 浏览型号CDC2351MDBREPG4的Datasheet PDF文件第2页浏览型号CDC2351MDBREPG4的Datasheet PDF文件第3页浏览型号CDC2351MDBREPG4的Datasheet PDF文件第4页浏览型号CDC2351MDBREPG4的Datasheet PDF文件第5页浏览型号CDC2351MDBREPG4的Datasheet PDF文件第6页浏览型号CDC2351MDBREPG4的Datasheet PDF文件第7页 
ꢀꢁ ꢀꢂ ꢃꢄ ꢅꢆ ꢇꢈ  
ꢅ ꢆꢉ ꢊꢋꢇ ꢌ ꢍ ꢅ ꢎ ꢆꢉ ꢊꢋꢇ ꢀꢉ ꢍ ꢀꢏ ꢁ ꢐꢊ ꢑ ꢇꢐ  
ꢒ ꢊꢌ ꢓ ꢃ ꢆꢔꢌꢕꢌ ꢇ ꢍ ꢖꢌ ꢈ ꢖꢌꢔ  
SGLS248A − JUNE 2004 − REVISED AUGUST 2004  
D
Controlled Baseline  
− One Assembly/Test Site, One Fabrication  
Site  
D
Outputs Have Internal Series Damping  
Resistor to Reduce Transmission Line  
Effects  
D
D
D
D
D
Extended Temperature Performance of  
−55°C to 125°C  
Enhanced Diminishing Manufacturing  
Sources (DMS) Support  
D
D
D
Distributed V  
Switching Noise  
and Ground Pins Reduce  
CC  
State-of-the-Art EPIC-ΙΙBBiCMOS Design  
Significantly Reduces Power Dissipation  
Enhanced Product-Change Notification  
Shrink Small-Outline (DB) Package  
Qualification Pedigree  
DB PACKAGE  
(TOP VIEW)  
Low Output Skew, Low Pulse Skew for  
Clock-Distribution and Clock-Generation  
Applications  
GND  
Y10  
GND  
23 Y1  
1
24  
D
D
D
Operates at 3.3-V V  
CC  
LVTTL-Compatible Inputs and Outputs  
2
V
3
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
V
Y2  
GND  
Y3  
Y4  
GND  
Y5  
V
Y6  
GND  
CC  
CC  
4
Y9  
OE  
A
P0  
P1  
Y8  
Supports Mixed-Mode Signal Operation  
(5-V Input and Output Voltages With  
5
6
3.3-V V  
)
CC  
7
D
Distributes One Clock Input to 10 Outputs  
8
Component qualification in accordance with JEDEC and industry  
standards to ensure reliable operation over an extended  
temperature range. This includes, but is not limited to, Highly  
Accelerated Stress Test (HAST) or biased 85/85, temperature  
cycle, autoclave or unbiased HAST, electromigration, bond  
intermetallic life, and mold compound life. Such qualification  
testing should not be viewed as justifying use of this component  
beyond specified performance and environmental limits.  
9
10  
11  
12  
V
CC  
Y7  
CC  
GND  
description  
The CDC2351 is a high-performance clock-driver circuit that distributes one input (A) to 10 outputs (Y) with  
minimum skew for clock distribution. The output-enable (OE) input disables the outputs to a high-impedance  
state. Each output has an internal series damping resistor to improve signal integrity at the load. The CDC2351  
operates at nominal 3.3-V V  
.
CC  
The propagation delays are adjusted at the factory using the P0 and P1 pins. The factory adjustments ensure  
that the part-to-part skew is minimized and is kept within a specified window. Pins P0 and P1 are not intended  
for customer use and should be connected to GND.  
The CDC2351M is characterized for operation over the full military temperature range of −55°C to 125°C.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
T
A
PACKAGE  
−55°C to 125°C  
SSOP − DB Tape and Reel  
CDC2351MDBREP  
CK2351MEP  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design  
guidelines are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC-ΙΙΒ is a trademark of Texas Instruments.  
ꢌꢢ  
Copyright 2004, Texas Instruments Incorporated  
ꢞ ꢢ ꢟ ꢞꢗ ꢘꢬ ꢚꢙ ꢝ ꢥꢥ ꢣꢝ ꢛ ꢝ ꢜ ꢢ ꢞ ꢢ ꢛ ꢟ ꢧ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

CDC2351MDBREPG4 替代型号

型号 品牌 替代类型 描述 数据表
CDC2351MDBREP TI

类似代替

1-LINE TO 10-LINE CLOCK DRIVER WITH 3-STATE OUTPUTS
CDC2351QDBR TI

类似代替

1-LINE TO 10-LINE CLOCK DRIVER WITH 3-STATE OUTPUTS
CDC2351QDB TI

类似代替

1-LINE TO 10-LINE CLOCK DRIVER WITH 3-STATE OUTPUTS

与CDC2351MDBREPG4相关器件

型号 品牌 获取价格 描述 数据表
CDC2351PWR TI

获取价格

1-LINE TO 10-LINE CLOCK DRIVER WITH 3-STATE OUTPUTS
CDC2351PWRG4 TI

获取价格

1-LINE TO 10-LINE CLOCK DRIVER WITH 3-STATE OUTPUTS
CDC2351-Q1 TI

获取价格

具有三态输出的汽车类 1 线路至 10 线路时钟驱动器
CDC2351QDB TI

获取价格

1-LINE TO 10-LINE CLOCK DRIVER WITH 3-STATE OUTPUTS
CDC2351QDBG4 TI

获取价格

1-LINE TO 10-LINE CLOCK DRIVER WITH 3-STATE OUTPUTS
CDC2351QDBLE TI

获取价格

LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24, PLASTIC, SSOP-24
CDC2351QDBR TI

获取价格

1-LINE TO 10-LINE CLOCK DRIVER WITH 3-STATE OUTPUTS
CDC2351QDBRG4 TI

获取价格

1-LINE TO 10-LINE CLOCK DRIVER WITH 3-STATE OUTPUTS
CDC2351QDW TI

获取价格

暂无描述
CDC2351QDWR TI

获取价格

LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24, PLASTIC, SO-24