生命周期: | Obsolete | 包装说明: | , |
Reach Compliance Code: | unknown | HTS代码: | 8542.39.00.01 |
风险等级: | 5.43 | Is Samacsys: | N |
其他特性: | MASTER SLAVE OPERATION | 系列: | HCT |
JESD-30 代码: | R-PDIP-T14 | 逻辑集成电路类型: | J-K FLIP-FLOP |
位数: | 2 | 功能数量: | 2 |
端子数量: | 14 | 最高工作温度: | 125 °C |
最低工作温度: | -55 °C | 输出极性: | COMPLEMENTARY |
封装主体材料: | PLASTIC/EPOXY | 封装形状: | RECTANGULAR |
封装形式: | IN-LINE | 认证状态: | Not Qualified |
最大供电电压 (Vsup): | 5.5 V | 最小供电电压 (Vsup): | 4.5 V |
标称供电电压 (Vsup): | 5 V | 表面贴装: | NO |
技术: | CMOS | 温度等级: | MILITARY |
端子形式: | THROUGH-HOLE | 端子位置: | DUAL |
触发器类型: | NEGATIVE EDGE | Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
CD74HCT73F | ETC |
获取价格 |
Logic IC | |
CD74HCT73H | RENESAS |
获取价格 |
IC,FLIP-FLOP,DUAL,J/K TYPE,HCT-CMOS,DIE | |
CD74HCT73M | ROCHESTER |
获取价格 |
HCT SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14 | |
CD74HCT73M | RENESAS |
获取价格 |
IC,FLIP-FLOP,DUAL,J/K TYPE,HCT-CMOS,SOP,14PIN,PLASTIC | |
CD74HCT73M | TI |
获取价格 |
Dual J-K Flip-Flop with Reset Negative-Edge Trigger | |
CD74HCT73M96 | RENESAS |
获取价格 |
HCT SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14 | |
CD74HCT73M96 | TI |
获取价格 |
HCT SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14, PLAS | |
CD74HCT73ME4 | TI |
获取价格 |
Dual J-K Flip-Flop with Reset Negative-Edge Trigger | |
CD74HCT73MG4 | TI |
获取价格 |
Dual J-K Flip-Flop with Reset Negative-Edge Trigger | |
CD74HCT74 | TI |
获取价格 |
Dual D Flip-Flop with Set and Reset Positive-Edge Trigger |