5秒后页面跳转
捷配首页

Datasheet > CD74HCT73M96
CD74HCT73M96 PDF预览

CD74HCT73M96

更新时间： 2024-11-26 21:13:51
品牌 Logo 应用领域
德州仪器 - TI 光电二极管输出元件逻辑集成电路触发器
页数 文件大小 规格书
17页 618K
描述
HCT SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14, PLASTIC, MS-012, SOIC-14

阅读下载

中文翻译

获取价格

CD74HCT73M96 技术参数

生命周期：Obsolete零件包装代码：SOIC
包装说明：SOP,针数：14
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.69系列：HCT
JESD-30 代码：R-PDSO-G14逻辑集成电路类型：J-K FLIP-FLOP
位数：2功能数量：2
端子数量：14最高工作温度：125 °C
最低工作温度：-55 °C输出极性：COMPLEMENTARY
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
传播延迟（tpd）：57 ns认证状态：Not Qualified
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：MILITARY
端子形式：GULL WING端子位置：DUAL
触发器类型：NEGATIVE EDGE最小 fmax：20 MHz
Base Number Matches：1

CD74HCT73M96 数据手册

 浏览型号CD74HCT73M96的Datasheet PDF文件第2页浏览型号CD74HCT73M96的Datasheet PDF文件第3页浏览型号CD74HCT73M96的Datasheet PDF文件第4页浏览型号CD74HCT73M96的Datasheet PDF文件第5页浏览型号CD74HCT73M96的Datasheet PDF文件第6页浏览型号CD74HCT73M96的Datasheet PDF文件第7页 
CD54HC73, CD74HC73,  
CD74HCT73  
Data sheet acquired from Harris Semiconductor  
SCHS134E  
Dual J-K Flip-Flop with Reset  
Negative-Edge Trigger  
February 1998 - Revised September 2003  
Features  
Description  
• Hysteresis on Clock Inputs for Improved Noise  
Immunity and Increased Input Rise and Fall Times  
The ’HC73 and CD74HCT73 utilize silicon gate CMOS  
technology to achieve operating speeds equivalent to LSTTL  
parts. They exhibit the low power consumption of standard  
CMOS integrated circuits, together with the ability to drive 10  
LSTTL loads.  
[ /Title  
(CD74  
HC73,  
CD74  
HCT73  
)
• Asynchronous Reset  
• Complementary Outputs  
• Buffered Inputs  
These flip-flops have independent J, K, Reset and Clock  
inputs and Q and Q outputs. They change state on the  
negative-going transition of the clock pulse. Reset is  
accomplished asynchronously by a low level input. This  
device is functionally identical to the HC/HCT107 but differs  
in terminal assignment and in some parametric limits.  
• Typical f  
MAX  
= 60MHz at V = 5V, C = 15pF,  
CC L  
o
T = 25 C  
A
/Sub-  
ject  
• Fanout (Over Temperature Range)  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
(Dual  
J-K  
Flip-  
Flop  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads The HCT logic family is functionally as well as pin compatible  
with the standard LS logic family.  
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C  
• Balanced Propagation Delay and Transition Times  
Ordering Information  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
TEMP. RANGE  
o
PART NUMBER  
CD54HC73F3A  
CD74HC73E  
( C)  
PACKAGE  
14 Ld CERDIP  
14 Ld PDIP  
14 Ld SOIC  
14 Ld SOIC  
14 Ld SOIC  
14 Ld PDIP  
14 Ld SOIC  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
• HC Types  
- 2V to 6V Operation  
- High Noise Immunity: N = 30%, N = 30% of V  
IL IH CC  
CD74HC73M  
at V  
= 5V  
CC  
CD74HC73MT  
CD74HC73M96  
CD74HCT73E  
CD74HCT73M  
• HCT Types  
- 4.5V to 5.5V Operation  
- Direct LSTTL Input Logic Compatibility,  
V = 0.8V (Max), V = 2V (Min)  
IL IH  
- CMOS Input Compatibility, I ≤ 1µA at V , V  
OL OH  
l
NOTE: When ordering, use the entire part number. The suffix 96  
denotes tape and reel. The suffix T denotes a small-quantity reel of  
250.  
Pinout  
CD54HC73 (CERDIP)  
CD74HC73, CD74HCT73 (PDIP, SOIC)  
TOP VIEW  
1CP  
1R  
1
2
3
4
5
6
7
14 1J  
13 1Q  
12 1Q  
11 GND  
10 2K  
1K  
V
CC  
2CP  
2R  
9
8
2Q  
2Q  
2J  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
Copyright © 2003, Texas Instruments Incorporated  
1
1234567...17

中文翻译

下载PDF

与CD74HCT73M96相关器件

型号 品牌 获取价格 描述 数据表
CD74HCT73ME4 TI

获取价格

 		Dual J-K Flip-Flop with Reset Negative-Edge Trigger
CD74HCT73MG4 TI

获取价格

 		Dual J-K Flip-Flop with Reset Negative-Edge Trigger
CD74HCT74 TI

获取价格

 		Dual D Flip-Flop with Set and Reset Positive-Edge Trigger
CD74HCT74E TI

获取价格

 		Dual D Flip-Flop with Set and Reset Positive-Edge Trigger
CD74HCT74E ROCHESTER

获取价格

 		D Flip-Flop, HCT Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary Output, CMO
CD74HCT74EE4 ROCHESTER

获取价格

 		D Flip-Flop, HCT Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary Output, CMO
CD74HCT74EN ETC

获取价格

 		Logic IC
CD74HCT74EX ROCHESTER

获取价格

 		D Flip-Flop, HCT Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary Output, CMO
CD74HCT74EX RENESAS

获取价格

 		IC,FLIP-FLOP,DUAL,D TYPE,HCT-CMOS,DIP,14PIN,PLASTIC
CD74HCT74F ETC

获取价格

 		Logic IC

与CD74HCT73M96相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证