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CD4049UBKNSR PDF预览

CD4049UBKNSR

更新时间: 2024-11-26 03:22:07
品牌 Logo 应用领域
英特矽尔 - INTERSIL 转换器
页数 文件大小 规格书
11页 315K
描述
CMOS Hex Buffer/Converter

CD4049UBKNSR 数据手册

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CD4049UBMS  
®
Data Sheet  
March 6, 2007  
FN3315.1  
CMOS Hex Buffer/Converter  
Features  
The CD4049UBMS is an inverting hex buffer and features  
logic level conversion using only one supply (voltage (VCC).  
The input signal high level (VIH) can exceed the VCC supply  
voltage when this device is used for logic level conversions.  
This device is intended for use as CMOS to DTL/TTL  
converters and can drive directly two DTL/TTL loads.  
(VCC = 5V, VOL 0.4V, and IOL 3.3mA.  
• High Voltage Type (20V Rating)  
• Inverting Type  
• High Sink Current for Driving 2 TTL Loads  
• High-to-Low Level Logic Conversion  
• 100% Tested for Quiescent Current at 20V  
• Maximum Input Current of 1mA at 18V Over Full Package  
Temperature Range; 100nA at 18V and +25°C  
The CD4049UBMS is designated as replacement for  
CD4009UB. Because the CD4049UBMS requires only one  
power supply, it is preferred over the CD4009UB and  
CD4010B and should be used in place of the CD4009UB in  
all inverter, current driver, or logic level conversion  
applications. In these applications the CD4049UBMS is pin  
compatible with the CD4009UB, and can be substituted for  
this device in existing as well as in new designs. Terminal  
No. 16 is not connected internally on the CD4049UBMS,  
therefore, connection to this terminal is of no consequence  
to circuit operation. For applications not requiring high sink  
current or voltage conversion, the CD4069UB Hex Inverter is  
recommended.  
• 5V, 10V and 15V Parametric Ratings  
Applications  
• CMOS to DTL/TTL Hex Converter  
• CMOS Current “Sink” or “Source” Driver  
• CMOS High-to-Low Logic Level Converter  
Pinout  
CD4049UBMS  
TOP VIEW  
The CD4049UBMS is supplied in these 16 lead outline  
packages:  
VCC  
G = A  
A
1
2
3
4
5
6
7
8
16 NC  
15 L = F  
Braze Seal DIP H4S  
14  
F
Frit Seal DIP  
H1E  
H = B  
B
13 NC  
12 K = E  
Ceramic Flatpack H3X  
I = C  
C
11  
E
10 J = D  
Functional Diagram  
9
D
VSS  
3
5
2
A
G = A  
H = B  
I = C  
4
Schematic  
B
C
D
E
F
VCC  
7
6
9
10  
12  
15  
J = D  
K = E  
L = F  
1
8
P
VCC  
VSS  
11  
14  
R
IN  
OUT  
N
NC = 13  
NC = 16  
VSS  
FIGURE 1. SCHEMATIC DIAGRAM, 1 OF 6 IDENTICAL UNITS  
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
Copyright Intersil Americas Inc. 2006, 2007. All Rights Reserved  
All other trademarks mentioned are the property of their respective owners.  

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