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CD4049UBMJ PDF预览

CD4049UBMJ

更新时间: 2024-11-22 22:17:51
品牌 Logo 应用领域
美国国家半导体 - NSC 逻辑集成电路
页数 文件大小 规格书
6页 132K
描述
Hex Inverting,Non-Inverting Buffer

CD4049UBMJ 数据手册

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March 1988  
CD4049UBM/CD4049UBC Hex Inverting Buffer  
CD4050BM/CD4050BC Hex Non-Inverting Buffer  
General Description  
These hex buffers are monolithic complementary MOS  
(CMOS) integrated circuits constructed with N- and P-chan-  
nel enhancement mode transistors. These devices feature  
Features  
Y
Wide supply voltage range  
3.0V to 15V  
Y
Direct drive to 2 TTL loads at 5.0V over full tempera-  
ture range  
Y
Y
logic level conversion using only one supply voltage (V ).  
DD  
High source and sink current capability  
Special input protection permits input voltages greater  
than V  
The input signal high level (V ) can exceed the V  
IH  
supply  
DD  
voltage when these devices are used for logic level conver-  
sions. These devices are intended for use as hex buffers,  
CMOS to DTL/TTL converters, or as CMOS current drivers,  
DD  
Applications  
Y
e
loads over the full operating temperature range.  
and at V  
5.0V, they can drive directly two DTL/TTL  
DD  
CMOS hex inverter/buffer  
Y
CMOS to DTL/TTL hex converter  
Y
CMOS current ‘‘sink’’ or ‘‘source’’ driver  
Y
CMOS high-to-low logic level converter  
Connection Diagrams  
CD4049UBM/CD4049UBC  
Dual-In-Line Package  
CD4050BM/CD4050BC  
Dual-In-Line Package  
TL/F/5971–1  
TL/F/5971–2  
Top View  
Top View  
Order Number CD4049UB or CD4049B  
Order Number CD4050UB or CD4050B  
C
1995 National Semiconductor Corporation  
TL/F/5971  
RRD-B30M105/Printed in U. S. A.  

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