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CD4049UBMJMIL PDF预览

CD4049UBMJMIL

更新时间: 2024-11-04 18:34:35
品牌 Logo 应用领域
德州仪器 - TI 输入元件逻辑集成电路触发器
页数 文件大小 规格书
6页 339K
描述
4000/14000/40000 SERIES, HEX 1-INPUT INVERT GATE, CDIP16, CERAMIC, DIP-16

CD4049UBMJMIL 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP16,.3
针数:16Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.63
系列:4000/14000/40000JESD-30 代码:R-GDIP-T16
JESD-609代码:e0负载电容(CL):50 pF
逻辑集成电路类型:INVERTER最大I(ol):0.0032 A
功能数量:6输入次数:1
端子数量:16最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DIP封装等效代码:DIP16,.3
封装形状:RECTANGULAR封装形式:IN-LINE
电源:3/15 VProp。Delay @ Nom-Sup:120 ns
传播延迟(tpd):85 ns认证状态:Not Qualified
施密特触发器:NO筛选级别:MIL-STD-883 Class B (Modified)
座面最大高度:5.08 mm子类别:Gates
最大供电电压 (Vsup):15 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
宽度:7.62 mmBase Number Matches:1

CD4049UBMJMIL 数据手册

 浏览型号CD4049UBMJMIL的Datasheet PDF文件第2页浏览型号CD4049UBMJMIL的Datasheet PDF文件第3页浏览型号CD4049UBMJMIL的Datasheet PDF文件第4页浏览型号CD4049UBMJMIL的Datasheet PDF文件第5页浏览型号CD4049UBMJMIL的Datasheet PDF文件第6页 
March 1988  
CD4049UBM/CD4049UBC Hex Inverting Buffer  
CD4050BM/CD4050BC Hex Non-Inverting Buffer  
General Description  
These hex buffers are monolithic complementary MOS  
(CMOS) integrated circuits constructed with N- and P-chan-  
nel enhancement mode transistors. These devices feature  
Features  
Y
Wide supply voltage range  
3.0V to 15V  
Y
Direct drive to 2 TTL loads at 5.0V over full tempera-  
ture range  
Y
Y
logic level conversion using only one supply voltage (V ).  
DD  
High source and sink current capability  
Special input protection permits input voltages greater  
than V  
The input signal high level (V ) can exceed the V  
IH  
supply  
DD  
voltage when these devices are used for logic level conver-  
sions. These devices are intended for use as hex buffers,  
CMOS to DTL/TTL converters, or as CMOS current drivers,  
DD  
Applications  
Y
e
loads over the full operating temperature range.  
and at V  
5.0V, they can drive directly two DTL/TTL  
DD  
CMOS hex inverter/buffer  
Y
CMOS to DTL/TTL hex converter  
Y
CMOS current ‘‘sink’’ or ‘‘urc’ driv
Y
CMOS high-to-low logic levenverter  
Connection Diagrams  
CD4049UBM/CD4049UBC  
Dual-In-Line Package  
C/CD40BC  
D-Line Paage  
5971–1  
TL/F/5971–2  
Top View  
Order CD4049B  
Order Number CD4050UB or CD4050B  
C
1995 National Semiconductor Corporation  
TL/F/5971  
RRD-B30M105/Printed in U. S. A.  

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