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CD4049UBMS PDF预览

CD4049UBMS

更新时间: 2024-11-03 22:17:51
品牌 Logo 应用领域
英特矽尔 - INTERSIL 转换器
页数 文件大小 规格书
7页 78K
描述
CMOS Hex Buffer/Converter

CD4049UBMS 数据手册

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CD4049UBMS  
Data Sheet  
December 1992  
File Number 3315  
CMOS Hex Buffer/Converter  
Features  
• High Voltage Type (20V Rating)  
The CD4049UBMS is an inverting hex buffer and features  
logic level conversion using only one supply (voltage (VCC).  
The input signal high level (VIH) can exceed the VCC supply  
voltage when this device is used for logic level conversions.  
This device is intended for use as CMOS to DTL/TTL  
converters and can drive directly two DTL/TTL loads. (VCC  
= 5V, VOL 0.4V, and IOL 3.3mA.  
• Inverting Type  
• High Sink Current for Driving 2 TTL Loads  
• High-to-Low Level Logic Conversion  
• 100% Tested for Quiescent Current at 20V  
• Maximum Input Current of 1µA at 18V Over Full Pack-  
The CD4049UBMS is designated as replacement for  
CD4009UB. Because the CD4049UBMS requires only one  
power supply, it is preferred over the CD4009UB and  
CD4010B and should be used in place of the CD4009UB in  
all inverter, current driver, or logic level conversion applica-  
tions. In these applications the CD4049UBMS is pin compat-  
ible with the CD4009UB, and can be substituted for this  
device in existing as well as in new designs. Terminal No. 16  
is not connected internally on the CD4049UBMS, therefore,  
connection to this terminal is of no consequence to circuit  
operation. For applications not requiring high sink current or  
voltage conversion, the CD4069UB Hex Inverter is recom-  
mended.  
o
age Temperature Range; 100nA at 18V and +25 C  
• 5V, 10V and 15V Parametric Ratings  
Applications  
• CMOS to DTL/TTL Hex Converter  
• CMOS Current “Sink” or “Source” Driver  
• CMOS High-to-Low Logic Level Converter  
Pinout  
CD4049UBMS  
TOP VIEW  
The CD4049UBMS is supplied in these 16 lead outline pack-  
ages:  
VCC  
G = A  
A
1
2
3
4
5
6
7
8
16 NC  
Braze Seal DIP  
Frit Seal DIP  
H4S  
H1E  
15 L = F  
14  
F
H = B  
B
13 NC  
Ceramic Flatpack H3X  
12 K = E  
I = C  
C
11  
E
10 J = D  
9
D
VSS  
Functional Diagram  
Schematic  
VCC  
3
5
2
A
G = A  
H = B  
I = C  
4
B
C
D
E
F
7
6
P
R
IN  
OUT  
9
10  
12  
15  
J = D  
K = E  
L = F  
N
1
8
VCC  
VSS  
11  
14  
VSS  
NC = 13  
NC = 16  
FIGURE 1. SCHEMATIC DIAGRAM, 1 OF 6 IDENTICAL UNITS  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999  
1

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