Datasheet > CAV25512

CAV25512

更新时间： 2024-09-10 12:49:07

品牌	Logo	应用领域
安森美 - ONSEMI		可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数	文件大小	规格书
13页	174K
描述
512-Kb SPI Serial CMOS EEPROM

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中文翻译

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CAV25512 数据手册

CAV25512

512-Kb SPI Serial CMOS

EEPROM

Description

The CAV25512 is a 512−Kb Serial CMOS EEPROM device

internally organized as 64Kx8 bits. This features a 128−byte page

write buffer and supports the Serial Peripheral Interface (SPI)

protocol. The device is enabled through a Chip Select (CS) input. In

addition, the required bus signals are clock input (SCK), data input

(SI) and data output (SO) lines. The HOLD input may be used to pause

any serial communication with the CAV25512 device. The device

features software and hardware write protection, including partial as

well as full array protection.

http://onsemi.com

SOIC−8

V SUFFIX

CASE 751BD

On−Chip ECC (Error Correction Code) makes the device suitable

for high reliability applications.

Features

• Automotive Temperature Grade 1 (−40°C to +125°C)

• 10 MHz SPI Compatible

TSSOP−8

Y SUFFIX

CASE 948AL

• 2.5 V to 5.5 V Supply Voltage Range

• SPI Modes (0,0) & (1,1)

• 128−byte Page Write Buffer

PIN CONFIGURATION

• Additional Identification Page with Permanent Write Protection

• Self−timed Write Cycle

• Hardware and Software Protection

• Block Write Protection

HOLD

SCK

− Protect / , / or Entire EEPROM Array

• Low Power CMOS Technology

• 1,000,000 Program/Erase Cycles

• 100 Year Data Retention

SOIC (V), TSSOP (Y)

• SOIC and TSSOP 8−lead Packages

• This Device is Pb−Free, Halogen Free/BFR Free, and RoHS

Compliant

PIN FUNCTION

Pin Name

Function

Chip Select

Serial Data Output

Write Protect

Ground

Serial Data Input

Serial Clock

CAV25512

SCK

HOLD

SCK

HOLD

Hold Transmission Input

Power Supply

Figure 1. Functional Symbol

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 13 of this data sheet.

Publication Order Number:

June, 2013 − Rev. 0

CAV25512/D

12 3 4 5 6 7...13

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