Datasheet > CAV25640VP2E-GT3

CAV25640VP2E-GT3

更新时间： 2024-11-03 01:08:51

品牌	Logo	应用领域
安森美 - ONSEMI		可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数	文件大小	规格书
14页	159K
描述
64-Kb SPI Serial CMOS EEPROM

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CAV25640VP2E-GT3 数据手册

CAV25640

64-Kb SPI Serial CMOS

EEPROM

Description

The CAV25640 is a 64−Kb Serial CMOS EEPROM device

internally organized as 8Kx8 bits. This features a 64−byte page write

buffer and supports the Serial Peripheral Interface (SPI) protocol. The

device is enabled through a Chip Select (CS) input. In addition, the

required bus signals are clock input (SCK), data input (SI) and data

output (SO) lines. The HOLD input may be used to pause any serial

communication with the CAV25640 device. The device features

software and hardware write protection, including partial as well as

full array protection.

http://onsemi.com

SOIC−8

V SUFFIX

TSSOP−8

Y SUFFIX

CASE 751BD

CASE 948AL

Features

• Automotive Temperature Grade 1 (−40°C to +125°C)

• 10 MHz SPI Compatible

TDFN−8

VP2 SUFFIX

CASE 511AK

• 2.5 V to 5.5 V Supply Voltage Range

• SPI Modes (0,0) & (1,1)

• 64−byte Page Write Buffer

• Self−timed Write Cycle

PIN CONFIGURATION

• Hardware and Software Protection

• CAV Prefix for Automotive and Other Applications Requiring Site

and Change Control

HOLD

SCK

• Block Write Protection

− Protect / , / or Entire EEPROM Array

• Low Power CMOS Technology

• 1,000,000 Program/Erase Cycles

• 100 Year Data Retention

• SOIC, TSSOP 8−lead and TDFN 8−pad Packages

• This Device is Pb−Free, Halogen Free/BFR Free, and RoHS

Compliant

SOIC (V), TSSOP (Y), TDFN (VP2)

PIN FUNCTION

Pin Name

Function

Chip Select

Serial Data Output

Write Protect

Ground

Serial Data Input

Serial Clock

CAV25640

SCK

HOLD

SCK

HOLD

Hold Transmission Input

Power Supply

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 14 of this data sheet.

Figure 1. Functional Symbol

Publication Order Number:

July, 2011 − Rev. 0

CAV25640/D

12 3 4 5 6 7...14

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