CAV25M01
1 Mb SPI Serial CMOS
EEPROM
Description
The CAV25M01 is a 1M−bit Serial CMOS EEPROM device
internally organized as 128Kx8 bits. This features a 256−byte page
write buffer and supports the Serial Peripheral Interface (SPI)
protocol. The device is enabled through a Chip Select (CS) input. In
addition, the required bus signals are clock input (SCK), data input
(SI) and data output (SO) lines. The HOLD input may be used to pause
any serial communication with the CAV25M01 device. The device
features software and hardware write protection, including partial as
well as full array protection.
http://onsemi.com
TSSOP−8
Y SUFFIX
SOIC−8
V SUFFIX
On−Chip ECC (Error Correction Code) makes the device suitable
for high reliability applications.
CASE 948AL
CASE 751BD
Features
PIN CONFIGURATION
• Automotive Temperature Grade 1 (−40°C to +125°C)
• 10 MHz SPI Compatible
• 2.5 V to 5.5 V Supply Voltage Range
• SPI Modes (0,0) & (1,1)
• 256−byte Page Write Buffer
V
CS
SO
WP
1
CC
HOLD
SCK
SI
V
SS
SOIC (V),
TSSOP (Y)
(Top View)
• Additional Identification Page with Permanent Write Protection
• Self−timed Write Cycle
• Hardware and Software Protection
• Block Write Protection –
PIN FUNCTION
Protect 1/4, 1/2 or Entire EEPROM Array
• Low Power CMOS Technology
• 1,000,000 Program/Erase Cycles
Pin Name
CS
Function
Chip Select
SO
Serial Data Output
Write Protect
• 100 Year Data Retention
• 8 lead SOIC and TSSOP Packages
• This Device is Pb−Free, Halogen Free/BFR Free and is RoHS
Compliant
WP
V
SS
Ground
SI
Serial Data Input
Serial Clock
V
CC
SCK
HOLD
Hold Transmission Input
Power Supply
SI
CS
V
CC
CAV25M01
SO
WP
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 13 of this data sheet.
HOLD
SCK
V
SS
Figure 1. Functional Symbol
© Semiconductor Components Industries, LLC, 2013
1
Publication Order Number:
June, 2013 − Rev. 1
CAV25M01/D