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BY25Q128ASFIG PDF预览

BY25Q128ASFIG

更新时间: 2024-09-16 02:50:23
品牌 Logo 应用领域
雷卯电子 - LEIDITECH /
页数 文件大小 规格书
73页 2753K
描述
128M BIT SPI NOR FLASH

BY25Q128ASFIG 数据手册

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Boya Microelectronics  
Memory Series  
BY25Q128AS  
128M BIT SPI NOR FLASH  
Features  
● Serial Peripheral Interface (SPI)  
- Standard SPI: SCLK, /CS, SI, SO, /WP, /HOLD  
- Dual SPI: SCLK, /CS, IO0, IO1, /WP, /HOLD  
- Quad SPI: SCLK, /CS, IO0, IO1, IO2, IO3  
● Read  
- Normal Read (Serial): 55MHz clock rate  
- Fast Read (Serial): 108MHz clock rate with 30PF load  
- Dual I/O data transfer up to 216Mbits/S  
- Quad I/O data transfer up to 432Mbits/S  
-Continuous Read with 8/16/32/64-byte Wrap  
● Program  
- Serial-input Page Program up to 256bytes  
- Program Suspend and Resume  
● Erase  
- Block erase (64/32 KB)  
- Sector erase (4 KB)  
- Chip erase  
- Erase Suspend and Resume  
● Program/Erase Speed  
- Page Program time: 0.6ms typical  
- Sector Erase time: 50ms typical  
- Block Erase time: 0.15/0.25s typical  
- Chip Erase time: 60s typical  
● Flexible Architecture  
- Sector of 4K-byte  
- Block of 32/64K-byte  
● Low Power Consumption  
- 25mA maximum active current  
- 5uA maximum power down current  
● Software/Hardware Write Protection  
- 3x256-Byte Security Registers with OTP Locks  
- Discoverable Parameters (SFDP) register  
- Enable/Disable protection with WP Pin  
- Write protect all/portion of memory via software  
- Top or Bottom, Sector or Block selection  
● Single Supply Voltage  
- Full voltage range: 2.7~3.6V  
● Temperature Range  
- Commercial (0to +70)  
- Industrial (-40to +85)  
- Industrial (-40to +105)  
● Cycling Endurance/Data Retention  
- Typical 100k Program-Erase cycles on any sector  
- Typical 20-year data retention  
July 2020  
Rev 1.5  
1 / 73  

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