Datasheet > BUK7830-30

BUK7830-30

更新时间： 2024-11-10 22:50:23

品牌	Logo	应用领域
恩智浦 - NXP		晶体晶体管
页数	文件大小	规格书
10页	60K
描述
TrenchMOS transistor Standard level FET

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BUK7830-30 数据手册

Philips Semiconductors

Product specification

TrenchMOS transistor

Standard level FET

BUK7830-30

GENERAL DESCRIPTION

QUICK REFERENCE DATA

N-channel enhancement mode

standard level field-effect power

transistor in a plastic envelope

suitable for surface mounting. Using

’trench’ technology, the device

features very low on-state resistance

and has integral zener diodes giving

ESD protection up to 2kV. It is

intended for use in automotive and

SYMBOL

PARAMETER

MAX.

UNIT

V_DS

I_D

Drain-source voltage

12.8

5.9

8.3

150

˚C

mΩ

Drain current (DC) T_sp= 25 ˚C

Drain current (DC) T_amb= 25 ˚C

Total power dissipation

Junction temperature

Drain-source on-state

resistance

P_tot

T_j

R_DS(ON)

V_GS= 10 V

general

purpose

switching

applications.

PINNING - SOT223

PIN CONFIGURATION

SYMBOL

DESCRIPTION

gate

drain

source

drain (tab)

LIMITING VALUES

Limiting values in accordance with the Absolute Maximum System (IEC 134)

SYMBOL PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

V_DS

V_DGR

±V_GS

I_D

Drain-source voltage

Drain-gate voltage

Gate-source voltage

Drain current (DC)

R_GS= 20 kΩ

T_sp= 25 ˚C

T_amb= 25 ˚C

T_sp= 100 ˚C

T_amb= 100 ˚C

T_sp= 25 ˚C

T_amb= 25 ˚C

T_sp= 25 ˚C

T_amb= 25 ˚C

12.8

5.9

4.1

51.2

23.6

8.3

1.8

150

I_D

Drain current (DC)

I_DM

Drain current (pulse peak value)

Total power dissipation

P_tot

˚C

T_stg, T_j

Storage & operating temperature

- 55

THERMAL RESISTANCES

SYMBOL PARAMETER

CONDITIONS

TYP.

MAX.

UNIT

R_{th j-sp}

Thermal resistance junction to

solder point

Mounted on any PCB

K/W

R_{th j-amb}

Thermal resistance junction to

ambient

Mounted on PCB of Fig.19

K/W

December 1997

Rev 1.100

12 3 4 5 6 7...10

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