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BUK7840-55,115 PDF预览

BUK7840-55,115

更新时间: 2024-11-11 14:48:11
品牌 Logo 应用领域
恩智浦 - NXP 开关脉冲光电二极管晶体管
页数 文件大小 规格书
9页 69K
描述
BUK7840-55

BUK7840-55,115 技术参数

生命周期:Obsolete零件包装代码:SC-73
包装说明:SMALL OUTLINE, R-PDSO-G4针数:4
Reach Compliance Code:unknownECCN代码:EAR99
风险等级:5.76Is Samacsys:N
其他特性:LOGIC LEVEL COMPATIBLE雪崩能效等级(Eas):60 mJ
外壳连接:DRAIN配置:SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压:55 V最大漏极电流 (ID):10.7 A
最大漏源导通电阻:0.04 ΩFET 技术:METAL-OXIDE SEMICONDUCTOR
JESD-30 代码:R-PDSO-G4元件数量:1
端子数量:4工作模式:ENHANCEMENT MODE
封装主体材料:PLASTIC/EPOXY封装形状:RECTANGULAR
封装形式:SMALL OUTLINE极性/信道类型:N-CHANNEL
最大脉冲漏极电流 (IDM):40 A认证状态:Not Qualified
表面贴装:YES端子形式:GULL WING
端子位置:DUAL晶体管应用:SWITCHING
晶体管元件材料:SILICONBase Number Matches:1

BUK7840-55,115 数据手册

 浏览型号BUK7840-55,115的Datasheet PDF文件第2页浏览型号BUK7840-55,115的Datasheet PDF文件第3页浏览型号BUK7840-55,115的Datasheet PDF文件第4页浏览型号BUK7840-55,115的Datasheet PDF文件第5页浏览型号BUK7840-55,115的Datasheet PDF文件第6页浏览型号BUK7840-55,115的Datasheet PDF文件第7页 
Philips Semiconductors  
Product specification  
TrenchMOS transistor  
Standard level FET  
BUK7840-55  
GENERAL DESCRIPTION  
QUICK REFERENCE DATA  
N-channel enhancement mode logic  
level field-effect power transistor in a  
plastic envelope suitable for surface  
mounting. Using ’trench’ technology  
the device features very low on-state  
resistance and has integral zener  
diodes giving ESD protection. It is  
intended for use in automotive and  
SYMBOL  
PARAMETER  
MAX.  
UNIT  
VDS  
ID  
Ptot  
Tj  
Drain-source voltage  
Drain current  
Total power dissipation  
Junction temperature  
Drain-source on-state  
55  
10.7  
1.8  
150  
40  
V
A
W
˚C  
m  
RDS(ON)  
resistance  
VGS = 10 V  
general  
purpose  
switching  
applications.  
PINNING - SOT223  
PIN CONFIGURATION  
SYMBOL  
PIN  
1
DESCRIPTION  
d
4
gate  
2
drain  
g
3
source  
drain (tab)  
4
s
2
3
1
LIMITING VALUES  
Limiting values in accordance with the Absolute Maximum System (IEC 134)  
SYMBOL PARAMETER  
CONDITIONS  
MIN.  
MAX.  
UNIT  
VDS  
VDGR  
±VGS  
ID  
Drain-source voltage  
-
-
-
-
-
-
55  
55  
16  
10.7  
5
V
V
V
A
A
Drain-gate voltage  
Gate-source voltage  
Drain current (DC)  
Drain current (DC)  
RGS = 20 kΩ  
-
Tsp = 25 ˚C  
On PCB in Fig.19  
Tamb = 25 ˚C  
On PCB in Fig.19  
Tamb = 100 ˚C  
Tsp = 25 ˚C  
Tsp = 25 ˚C  
On PCB in Fig.19  
Tamb = 25 ˚C  
-
ID  
ID  
Drain current (DC)  
-
3.1  
A
IDM  
Ptot  
Ptot  
Drain current (pulse peak value)  
Total power dissipation  
Total power dissipation  
-
-
-
40  
10.7  
1.8  
A
W
W
Tstg, Tj  
Storage & operating temperature  
- 55  
150  
˚C  
ESD LIMITING VALUE  
SYMBOL PARAMETER  
CONDITIONS  
MIN.  
MAX.  
UNIT  
VC  
Electrostatic discharge capacitor  
voltage  
Human body model  
(100 pF, 1.5 k)  
-
2
kV  
January 1998  
1
Rev 1.000  

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