BUK7880-55A

更新时间： 2024-11-10 22:22:19

品牌	Logo	应用领域
恩智浦 - NXP		晶体晶体管
页数	文件大小	规格书
9页	56K
描述
TrenchMOS transistor standard level FET

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BUK7880-55A 数据手册

Philips Semiconductors

Product specification

TrenchMOS transistor

Standard level FET

BUK7880-55

GENERAL DESCRIPTION

QUICK REFERENCE DATA

N-channel enhancement mode logic

level field-effect power transistor in a

plastic envelope suitable for surface

mounting. Using ’trench’ technolgy

the device features very low on-state

resistance and has integral zener

diodes giving ESD protection. It is

intended for use in automotive and

SYMBOL

PARAMETER

MAX.

UNIT

V_DS

I_D

P_tot

T_j

Drain-source voltage

Drain current

Total power dissipation

Junction temperature

Drain-source on-state

7.5

1.8

150

˚C

mΩ

R_DS(ON)

resistance

V_GS= 10 V

general

purpose

switching

applications.

PINNING - SOT223

PIN CONFIGURATION

SYMBOL

DESCRIPTION

gate

drain

source

drain (tab)

LIMITING VALUES

Limiting values in accordance with the Absolute Maximum System (IEC 134)

SYMBOL PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

V_DS

V_DGR

±V_GS

I_D

Drain-source voltage

7.5

3.5

Drain-gate voltage

Gate-source voltage

Drain current (DC)

R_GS= 20 kΩ

T_sp= 25 ˚C

On PCB in Fig.2

T_amb= 25 ˚C

On PCB in Fig.2

T_amb= 100 ˚C

T_sp= 25 ˚C

On PCB in Fig.2

T_amb= 25 ˚C

I_D

Drain current (DC)

2.2

I_DM

P_tot

Drain current (pulse peak value)

Total power dissipation

8.3

1.8

T_stg, T_j

Storage & operating temperature

- 55

150

˚C

ESD LIMITING VALUE

SYMBOL PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

V_C

Electrostatic discharge capacitor

voltage

Human body model

(100 pF, 1.5 kΩ)

April 1998

Rev 1.100

12 3 4 5 6 7...9

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