Very Low Power/Voltage CMOS SRAM
128K X 16 bit
BSI
BS616LV2010
FEATURES
DESCRIPTION
The BS616LV2010 is a high performance, very low power CMOS Static
Random Access Memory organized as 131,072 words by 16 bits and
operates from a wide range of 2.7V to 3.6V supply voltage.
• Very low operation voltage : 2.7 ~ 3.6V
• Very low power consumption :
Vcc = 3.0V
C-grade: 25mA (Max.) operating current
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with a typical CMOS standby current
of 0.15uA and maximum access time of 70ns in 3V operation.
Easy memory expansion is provided by active LOW chip enable(CE)
, active LOW output enable(OE) and three-state output drivers.
The BS616LV2010 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
I-grade: 30mA (Max.) operating current
0.15uA (Typ.) CMOS standby current
• High speed access time :
-70
-10
70ns (Max.) at Vcc = 3.0V
100ns (Max.) at Vcc = 3.0V
• Automatic power down when chip is deselected
• Three state outputs and TTL compatible
• Fully static operation
The BS616LV2010 is available in 44L-TSOP2 and 48-ball BGA package.
• Data retention supply voltage as low as 1.5V
• Easy expansion with CE and OE options
• I/O Configuration x8/x16 selectable by LB and UB pin
PRODUCT FAMILY
POWER DISSIPATION
SPEED
STANDBY
Operating
PRODUCT
FAMILY
OPERATING
TEMPERATURE
Vcc
RANGE
( ns )
( ICCSB1 , Max )
( ICC, Max )
PKG TYPE
Vcc=3.0V
Vcc=3.0V
Vcc=3.0V
BS616LV2010EC
BS616LV2010AC
BS616LV2010EI
BS616LV2010AI
TSOP2-44
+0O C to +70O C 2.7V ~ 3.6V
-40O C to +85O C 2.7V ~ 3.6V
70 / 100
70 / 100
8uA
25mA
30mA
BGA-48-0608
TSOP2-44
BGA-48-0608
12uA
BLOCK DIAGRAM
PIN CONFIGURATIONS
1
2
3
4
5
6
A8
A13
A
B
C
D
E
F
LB
D8
D9
OE
UB
A0
A3
A5
A1
A4
A2
N.C.
D0
A15
Address
20
A16
A14
1024
CE
D1
Input
Row
Decoder
Memory Array
1024 x 2048
A12
A7
D10
A6
D2
Buffer
A6
A5
A4
VSS D11 N.C.
A7
D3
VCC
VSS
VCC
D14
D12
D13
N.C.
A14
A16
A15
A13
A10
D4
2048
Data
Input
Buffer
16
16
16
D5
D6
D7
Column I/O
DQ0
.
.
.
.
.
.
.
.
Write Driver
Sense Amp
N.C.
A8
G
H
D15
N.C.
A12
A9
WE
A11
N.C.
128
Data
Output
16
Buffer
Column Decoder
DQ15
48-ball BGA top view
14
CE
WE
OE
UB
1
2
3
4
5
6
7
8
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A4
A3
A2
A1
A0
A5
A6
A7
OE
UB
LB
Control
Address Input Buffer
CE
LB
DQ0
DQ1
DQ2
DQ3
VCC
GND
DQ4
DQ5
DQ6
DQ7
WE
A16
A15
A14
A13
A12
A11 A9 A3 A2 A1
A0 A10
DQ15
DQ14
DQ13
DQ12
GND
VCC
DQ11
DQ10
DQ9
DQ8
NC
A8
A9
A10
A11
NC
9
10
11
12
13
14
15
16
17
18
19
20
21
22
Vcc
BS616LV2010EC
BS616LV2010EI
Gnd
Brilliance Semiconductor, Inc. reserves the right to modify document contents without notice.
Revision 2.3
R0201-BS616LV2010
1
Jan.
2004