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BS616LV2011TI

更新时间： 2024-11-30 23:04:27
品牌 Logo 应用领域
BSI 静态存储器
页数 文件大小 规格书
11页 238K
描述
Very Low Power/Voltage CMOS SRAM 128K X 16 bit

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中文翻译

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BS616LV2011TI 数据手册

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Very Low Power/Voltage CMOS SRAM  
128K X 16 bit  
BSI  
BS616LV2011  
„ FEATURES  
„ DESCRIPTION  
• Very low operation voltage : 2.4 ~ 5.5V  
• Very low power consumption :  
The BS616LV2011 is a high performance, very low power CMOS Static  
Random Access Memory organized as 131,072 words by 16 bits and  
operates from a wide range of 2.4V to 5.5V supply voltage.  
Advanced CMOS technology and circuit techniques provide both high  
speed and low power features with a typical CMOS standby current  
of 0.1uA and maximum access time of 70/100ns in 3V operation.  
Easy memory expansion is provided by an active LOW chip  
enable(CE), active LOW output enable(OE) and three-state output  
drivers.  
Vcc = 3.0V  
C-grade: 20mA (Max.) operating current  
I-grade: 25mA (Max.) operating current  
0.1uA (Typ.) CMOS standby current  
C-grade: 40mA (Max.) operating current  
I -grade: 45mA (Max.) operating current  
0.6uA (Typ.) CMOS standby current  
Vcc = 5.0V  
• High speed access time :  
-70  
-10  
70ns (Max.) at Vcc = 3.0V  
100ns (Max.) at Vcc = 3.0V  
The BS616LV2011 has an automatic power down feature, reducing the  
power consumption significantly when chip is deselected.  
The BS616LV2011 is available in DICE form, JEDEC standard 44-pin  
TSOP Type II package , JEDEC standard 48-pin TSOP Type I package  
and 48-ball BGA package.  
• Automatic power down when chip is deselected  
• Three state outputs and TTL compatible  
• Fully static operation  
• Data retention supply voltage as low as 1.5V  
• Easy expansion with CE and OE options  
• I/O Configuration x8/x16 selectable by LB and UB pin  
„ PRODUCT FAMILY  
POWER DISSIPATION  
SPEED  
( ns )  
(SICTCASBN1,DMBaxY)  
Operating  
PRODUCT  
FAMILY  
OPERATING  
Vcc  
( ICC, Max )  
PKG TYPE  
TEMPERATURE  
RANGE  
Vcc=  
3.0V  
Vcc=  
Vcc=  
Vcc=  
Vcc=  
5.0V  
3.0V  
5.0V  
3.0V  
BS616LV2011DC  
BS616LV2011EC  
BS616LV2011TC  
BS616LV2011AC  
BS616LV2011DI  
BS616LV2011EI  
BS616LV2011TI  
BS616LV2011AI  
DICE  
TSOP2-44  
TSOP1-48  
BGA-48-0608  
DICE  
+0 O C to +70O  
-40O C to +85O  
C
C
2.4V ~ 5.5V  
2.4V ~ 5.5V  
70/100  
70/100  
0.7uA  
6uA  
20mA  
40mA  
TSOP2-44  
TSOP1-48  
BGA-48-0608  
1.5uA  
25uA  
25mA  
45mA  
„ PIN CONFIGURATIONS  
„ BLOCK DIAGRAM  
1
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
A4  
A5  
2
A3  
A6  
3
A2  
A7  
4
A1  
OE  
A8  
A13  
5
A0  
UB  
6
CE  
LB  
7
DQ0  
DQ15  
DQ14  
DQ13  
DQ12  
GND  
VCC  
DQ11  
DQ10  
DQ9  
DQ8  
NC  
A15  
A16  
A14  
A12  
A7  
8
Address  
DQ1  
9
20  
BS616LV2011EC  
BS616LV2011EI  
DQ2  
DQ3  
VCC  
GND  
DQ4  
DQ5  
DQ6  
DQ7  
WE  
1024  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
Input  
Row  
Decoder  
Memory Array  
1024 x 2048  
Buffer  
A6  
A5  
A4  
A16  
A15  
A14  
A13  
A12  
A8  
A9  
A10  
A11  
NC  
2048  
Data  
16  
16  
16  
Column I/O  
Input  
DQ0  
Buffer  
.
.
.
.
.
.
.
.
Write Driver  
Sense Amp  
1
2
3
4
5
6
A0  
A1  
A4  
A6  
A2  
N.C.  
D0  
128  
Data  
A
B
C
D
E
F
LB  
OE  
16  
Output  
Buffer  
Column Decoder  
DQ15  
A3  
A5  
D8  
D9  
UB  
CE  
D1  
D2  
D10  
14  
CE  
WE  
OE  
UB  
D3  
D4  
D5  
D11  
D12  
D13  
Control  
N.C.  
N.C.  
A14  
A12  
A9  
VCC  
VSS  
D6  
Address Input Buffer  
VSS  
VCC  
D14  
D15  
N.C.  
A7  
A16  
LB  
A11 A9 A3 A2 A1  
A0 A10  
A15  
A13  
A10  
Vcc  
Gnd  
N.C.  
A8  
G
H
WE  
A11  
D7  
N.C.  
48-ball BGA top view  
Brilliance Semiconductor Inc. reserves the right to modify document contents without notice.  
Revision 2.5  
April 2002  
R0201-BS616LV2011  
1
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