Very Low Power/Voltage CMOS SRAM
128K X 16 bit
BSI
BS616LV2010
FEATURES
DESCRIPTION
• Very low operation voltage : 2.7 ~ 3.6V
• Very low power consumption :
The BS616LV2010 is a high performance, very low power CMOS Static
Random Access Memory organized as 131,072 words by 16 bits and
operates from a wide range of 2.7V to 3.6V supply voltage.
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with a typical CMOS standby current
of 0.15uA and maximum access time of 70/100ns in 3V operation.
Easy memory expansion is provided by active LOW chip
enable(CE), active LOW output enable(OE) and three-state output
drivers.
Vcc = 3.0V
C-grade: 25mA (Max.) operating current
I-grade: 30mA (Max.) operating current
0.15uA (Typ.) CMOS standby current
• High speed access time :
-70
-10
70ns (Max.) at Vcc = 3.0V
100ns (Max.) at Vcc = 3.0V
• Automatic power down when chip is deselected
• Three state outputs and TTL compatible
• Fully static operation
The BS616LV2010 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
The BS616LV2010 is available in DICE form , JEDEC standard
44-pin TSOP Type II package. 48-pin TSOP Type I package and 48-ball
BGA package.
• Data retention supply voltage as low as 1.5V
• Easy expansion with CE and OE options
• I/O Configuration x8/x16 selectable by LB and UB pin
PRODUCT FAMILY
POWER DISSIPATION
SPEED
(ns)
STANDBY
Operating
PRODUCT
FAMILY
OPERATING
Vcc
PKG TYPE
( ICCSB1, Max )
( ICC, Max )
TEMPERATURE
RANGE
Vcc=3.0V
70 / 100
70 / 100
Vcc=3.0V
8uA
Vcc=3.0V
25mA
BS616LV2010EC
BS616LV2010EI
+0 O C to +70O
-40 O C to +85O
C
C
2.7V ~ 3.6V
2.7V ~ 3.6V
TSOP2-44
TSOP2-44
12uA
30mA
PIN CONFIGURATIONS
BLOCK DIAGRAM
A8
A13
A15
A16
A14
Address
20
1024
Row
Input
Memory Array
1024 x 2048
A12
A7
A6
A5
A4
Buffer
1
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A4
A5
Decoder
2
A3
A6
3
A2
A7
4
A1
OE
5
A0
UB
6
CE
LB
2048
7
DQ0
DQ15
DQ14
DQ13
DQ12
GND
VCC
DQ11
DQ10
DQ9
DQ8
NC
8
DQ1
Data
9
16
16
16
DQ2
Column I/O
Input
DQ0
10
11
12
13
14
15
16
17
18
19
20
21
22
BS616LV2010EC
BS616LV2010EI
DQ3
VCC
GND
DQ4
DQ5
DQ6
DQ7
WE
Buffer
.
.
.
.
.
.
.
.
Write Driver
Sense Amp
128
Data
16
Output
Buffer
Column Decoder
A16
A15
A14
A13
A12
A8
A9
A10
A11
NC
DQ15
14
CE
WE
OE
UB
Control
Address Input Buffer
LB
A11 A9 A3 A2 A1
A0 A10
Vcc
Gnd
Brilliance Semiconductor Inc. reserves the right to modify document contents without notice.
Revision 2.2
April. 2001
R0201-BS616LV2010
1