Datasheet > BGU8823A

BGU8823A

更新时间： 2024-01-04 09:23:38

品牌	Logo	应用领域
恩智浦 - NXP		光电二极管
页数	文件大小	规格书
42页	577K
描述
Dual channel low-noise high linearity amplifier with DSA and SPDT

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BGU8823A 数据手册

NXP Semiconductors

BGU8823/A

Dual channel low-noise high linearity amplifier with DSA and SPDT

8 Functional description

8.1 DSA Direct-Access Functionality for Main and Diversity Channel

Logic truth table to control direct-access functionality of device. This functionality use

different from the default value of 15 dB. By default, the chip starts up in direct-access

mode. In both modes, direct-access DSA and SPI controlled DSA SPI bus remains fully

functional.

Changing the default attenuation of 15 dB use the following sequence: see also Table 22

and Table 23 below!

The BGU8823/A starts up in DSA direct-access mode when applying the supply voltage

to IC. Otherwise set direct-access mode with Pin 9 <DSA_0_X dB Main> to logic zero

"0" and pin 32 <Disable main Channel> to logic zero "0". Load register 0×13h bit 2 with

a logic zero "0". In direct-access mode register, 0x16h is used and its default value

is 15 dB or 0x3Ch). In order to change the default, write a different value X using SPI

functionality.

After desired attenuation value is loaded, you can toggle the logic level between logic

zero "0"and logic "1’. Switch between 0 dB attenuation (or I_L) and the programmed X dB

value.

In case of DSA controlled by SPI, use register 0×13h bit 2 with a logic "1". Note in case

of diversity channel the pin 23 change into GPO output. The GPO control is in register

0×13h bit 5.

Table 6.ꢀTruth table - Direct-access DSA main channel

Legend: * reset value

Pin 9

Pin 32

0x13h Bit 2

Value

DS Value and Control Description

<DSA_0_X

dB Main

<Disable

main

Channel>

"0"

I_L[dB]

DSA minimum value, 0 dB + I_LdB, register 0×16h

"1"*

"0"*

DSA Toggle between I_LDefault register value 0×16h is 15 dB (0×3 Ch)

and X [dB] set by

"1"

DSA controlled by SPI DSA access via SPI bus, default value is 0 dB

using register 0×11h

(0×00h)

Table 7.ꢀTruth table - Direct-access DSA Diversity channel

Legend: * reset value

Pin 23

Pin 24

0x13h Bit 1

Value

DS Value and Control Description

<DSA_0_X

<Disable

dB Diversity Diversity

Channel>

"0"

I_L[dB]

DSA minimum value, 0 dB + I_LdB, register 0×17h

BGU8823/A

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6 — 15 April 2020

6 / 42

1...3 4 567 8 9...42

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