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ATF2500CL-20NM PDF预览

ATF2500CL-20NM

更新时间: 2024-11-27 14:47:51
品牌 Logo 应用领域
爱特美尔 - ATMEL 时钟ATM异步传输模式输入元件可编程逻辑
页数 文件大小 规格书
33页 698K
描述
EE PLD, 20ns, 24-Cell, CMOS, CQCC44, 0.600 INCH, CERAMIC, LCC-44

ATF2500CL-20NM 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:LCC包装说明:QCCN, LCC44,.65SQ
针数:44Reach Compliance Code:compliant
ECCN代码:3A001.A.2.CHTS代码:8542.39.00.01
风险等级:5.83Is Samacsys:N
其他特性:NO最大时钟频率:33 MHz
系统内可编程:NOJESD-30 代码:S-CQCC-N44
JESD-609代码:e0JTAG BST:NO
长度:16.55 mm专用输入次数:14
I/O 线路数量:24宏单元数:24
端子数量:44最高工作温度:125 °C
最低工作温度:-55 °C组织:14 DEDICATED INPUTS, 24 I/O
输出函数:MACROCELL封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装代码:QCCN封装等效代码:LCC44,.65SQ
封装形状:SQUARE封装形式:CHIP CARRIER
峰值回流温度(摄氏度):240电源:5 V
可编程逻辑类型:EE PLD传播延迟:20 ns
认证状态:Not Qualified座面最大高度:2.74 mm
子类别:Programmable Logic Devices最大供电电压:5.5 V
最小供电电压:4.5 V标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:NO LEAD端子节距:1.27 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:16.55 mmBase Number Matches:1

ATF2500CL-20NM 数据手册

 浏览型号ATF2500CL-20NM的Datasheet PDF文件第2页浏览型号ATF2500CL-20NM的Datasheet PDF文件第3页浏览型号ATF2500CL-20NM的Datasheet PDF文件第4页浏览型号ATF2500CL-20NM的Datasheet PDF文件第5页浏览型号ATF2500CL-20NM的Datasheet PDF文件第6页浏览型号ATF2500CL-20NM的Datasheet PDF文件第7页 
Features  
High-performance, High-density, Electrically-erasable Programmable Logic Device  
Fully Connected Logic Array with 416 Product Terms  
10 ns Maximum Pin-to-pin Delay for 5V Operation  
Low-power Edge-sensing “L” Option with <1 mA Standby Current  
24 Flexible Output Macrocells  
– 48 Flip-flops – Two per Macrocell  
– 72 Sum Terms  
– All Flip-flops, I/O Pins Feed in Independently  
D- or T-type Flip-flops  
Product Term or Direct Input Pin Clocking  
Registered or Combinatorial Internal Feedback  
Backward Compatible with ATV2500B/BQL and ATV2500H/L Software  
Advanced Electrically-erasable Technology  
– Reprogrammable  
ATF2500C  
CPLD Family  
– 100% Tested  
44-lead Surface Mount Package  
ATF2500C  
Block Diagram  
ATF2500CL  
ATF2500CQ  
ATF2500CQL  
Preliminary  
Description  
The ATF2500C is the highest-density PLD available in a 44-pin package. With its fully  
connected logic array and flexible macrocell structure, high gate utilization is easily  
obtainable. The ATF2500C is a high-performance CMOS (electrically-erasable) pro-  
grammable logic device (PLD) that utilizes Atmel’s proven electrically-erasable  
technology.  
(continued)  
DIP  
PLCC/LCC/JLCC  
Pin Configurations  
IN  
IN  
1
2
3
4
5
6
7
8
9
40 IN  
Pin Name  
Function  
39 IN  
IN  
38 IN  
I/O0  
I/O1  
I/O2  
I/O3  
I/O4  
I/O5  
37 IN  
IN  
Logic Inputs  
36 I/O6  
35 I/O7  
34 I/O8  
33 I/O9  
32 I/O10  
31 I/O11  
30 GND  
29 I/O23  
28 I/O22  
27 I/O21  
26 I/O20  
25 I/O19  
24 I/O18  
23 IN  
I/O2  
I/O3  
I/O4  
7
8
9
39 I/O7  
38 I/O8  
37 I/O9  
36 I/O10  
35 I/O11  
34 GND  
33 GND  
32 I/O23  
31 I/O22  
30 I/O21  
29 I/O20  
CLK/IN  
I/O  
Pin Clock and Input  
Bi-directional Buffers  
“Even” I/O Buffers  
“Odd” I/O Buffers  
Ground  
I/O5 10  
VCC 11  
VCC 12  
I/O17 13  
I/O16 14  
I/O15 15  
I/O14 16  
I/O13 17  
VCC 10  
I/O17 11  
I/O16 12  
I/O15 13  
I/O14 14  
I/O13 15  
I/O12 16  
IN 17  
I/O 0,2,4...  
I/O 1,3,5...  
GND  
IN 18  
IN 19  
22 IN  
IN 20  
21 IN  
VCC  
+5V Supply  
Note:  
For ATF2500CQ and ATF2500CQL  
(PLCC/LCC packages) pin 4 and pin  
26 GND connections are not required.  
Rev. 0777E–04/01  

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