ADS6445-EP
www.ti.com ............................................................................................................................................................................................ SLAS573–FEBRUARY 2008
QUAD CHANNEL, 14 BIT, 125 MSPS ADC WITH SERIAL LVDS OUTPUTS
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FEATURES
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Supports Sine, LVCMOS, LVPECL, LVDS Clock
Inputs and Amplitude Down to 400 mVPP
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Controlled Baseline
Internal Reference with External Reference
Support
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One Assembly
Test Site
No External Decoupling Required for
References
One Fabrication Site
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–55°C to 125°C Operating Junction
Temperature Range
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3.3-V Analog and Digital Supply
64-pin QFN Package (9 mm × 9 mm)
Pin Compatible 12-Bit Family (ADS642x)
Enhanced Diminishing Manufacturing Sources
(DMS) Support
Feature Compatible Dual Channel Family
(ADS624x, ADS644x)
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Enhanced Product-Change Notification
(1)
Qualification Pedigree
Sample Rate: 125 MSPS
APPLICATIONS
14-Bit Resolution with No Missing Codes
Simultaneous Sample and Hold
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Base-Station IF Receivers
Diversity Receivers
Medical Imaging
3.5-dB Coarse Gain and up to 6-dB
Programmable Fine Gain for SFDR/SNR
Trade-Off
Test Equipment
Table 1. ADS64XX Quad Channel Family(1)
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Serialized LVDS Outputs with Programmable
Internal Termination Option
125 MSPS 105 MSPS 80 MSPS 65 MSPS
(1) Component qualification in accordance with JEDEC and
industry standards to ensure reliable operation over an
extended temperature range. This includes, but is not limited
to, Highly Accelerated Stress Test (HAST) or biased 85/85,
temperature cycle, autoclave or unbiased HAST,
ADS644X
14 Bit
ADS6445
ADS6425
ADS6444
ADS6424
ADS6443 ADS6442
ADS6423 ADS6422
ADS642X
12 Bit
electromigration, bond intermetallic life, and mold compound
life. Such qualification testing should not be viewed as
justifying use of this component beyond specified
performance and environmental limits.
(1) Product Preview for ADS6444, ADS6443, ADS6442 and
ADS642X family
Table 2. Performance Summary
ADS6445
87
ADS6444
91
ADS6443
92
ADS6442
93
Fin = 10 MHz (0 dB gain)
Fin = 170 MHz (3.5 dB gain)
Fin = 10 MHz (0 dB gain)
Fin = 170 MHz (3.5 dB gain)
Power, per channel, mW
SFDR, dBc
79
83
84
84
73.4
68.3
420
73.4
69.3
340
74.2
69.4
300
74.3
70
SINAD, dBFS
265
DESCRIPTION/ORDERING INFORMATION
The ADS6445/ADS6444/ADS6443/ADS6442 (ADS644X) is a family of high performance 14 bit 125/105/80/65
MSPS quad channel A-D converters. Serial LVDS data outputs reduce the number of interface lines, resulting in
a compact 64 pin QFN package (9 mm × 9 mm) that allows for high system integration density. The device
includes 3.5 dB coarse gain option that can be used to improve SFDR performance with little degradation in
SNR. In addition to the coarse gain, fine gain options also exist, programmable in 1 dB steps up to 6 dB.
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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2008, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.