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ADP5034

更新时间: 2024-02-22 03:52:44
品牌 Logo 应用领域
亚德诺 - ADI 稳压器
页数 文件大小 规格书
28页 701K
描述
Dual 3 MHz, 1200 mA Buck Regulators with Two 300 mA LDOs

ADP5034 技术参数

是否Rohs认证: 符合生命周期:Obsolete
Reach Compliance Code:unknown风险等级:5.84
JESD-30 代码:S-PQCC-N24端子数量:24
封装主体材料:PLASTIC/EPOXY封装代码:QCCN
封装等效代码:LCC24,.16SQ,20封装形状:SQUARE
封装形式:CHIP CARRIER电源:1.8/5,2.5/5 V
认证状态:Not Qualified子类别:Power Management Circuits
最大供电电流 (Isup):0.064 mA表面贴装:YES
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUADBase Number Matches:1

ADP5034 数据手册

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Dual 3 MHz, 1200 mA Buck  
Regulators with Two 300 mA LDOs  
ADP5034  
Data Sheet  
4 mm LFCSP to meet demanding performance and board space  
requirements.  
FEATURES  
Main input voltage range: 2.3 V to 5.5 V  
The high switching frequency of the buck regulators enables tiny  
multilayer external components and minimizes the board space.  
When the MODE pin is set to high, the buck regulators operate in  
forced PWM mode. When the MODE pin is set to low, the buck  
regulators operate in PWM mode when the load is above a pre-  
defined threshold. When the load current falls below a predefined  
threshold, the regulator operates in power save mode (PSM),  
improving the light load efficiency.  
Two 1200 mA buck regulators and two 300 mA LDOs  
24-lead, 4 mm × 4 mm LFCSP package  
Regulator accuracy: 3ꢀ  
Factory programmable or external adjustable VOUTx  
3 MHz buck operation with forced PWM and auto PWM/PSM  
modes  
BUCK1/BUCK2: output voltage range from 0.8 V to 3.8 V  
LDO1/LDO2: output voltage range from 0.8 V to 5.2 V  
LDO1/LDO2: low input supply voltage from 1.7 V to 5.5 V  
LDO1/LDO2: high PSRR and low output noise  
The two bucks operate out of phase to reduce the input capaci-  
tor requirement. The low quiescent current, low dropout voltage,  
and wide input voltage range of the ADP5034 LDOs extend the  
battery life of portable devices. The ADP5034 LDOs maintain  
power supply rejection greater than 60 dB for frequencies as  
high as 10 kHz while operating with a low headroom voltage.  
APPLICATIONS  
Power for processors, ASICS, FPGAs, and RF chipsets  
Portable instrumentation and medical devices  
Space constrained devices  
Regulators in the ADP5034 are activated through dedicated  
enable pins. The default output voltages can be externally set in  
the adjustable version, or factory programmable to a wide range  
of preset values in the fixed voltage version.  
GENERAL DESCRIPTION  
The ADP5034 combines two high performance buck regulators  
and two low dropout (LDO) regulators in a small, 24-lead 4 mm ×  
TYPICAL APPLICATION CIRCUIT  
AVIN  
HOUSEKEEPING  
C
0.1µF  
AVIN  
VOUT1  
L1 1µH  
VIN1  
SW1  
FB1  
2.3V TO  
5.5V  
V
AT  
OUT1  
1200mA  
C1  
R1  
R2  
4.7µF  
BUCK1  
MODE  
C5  
10µF  
PGND1  
ON  
EN1  
VIN2  
EN2  
EN1  
OFF  
PWM  
MODE  
PSM/PWM  
VOUT2  
MODE  
L2 1µH  
SW2  
FB2  
C2  
4.7µF  
V
AT  
OUT2  
1200mA  
R3  
R4  
BUCK2  
C6  
10µF  
EN2  
EN3  
PGND2  
EN3  
VOUT3  
FB3  
V
AT  
OUT3  
300mA  
LDO1  
(ANALOG)  
R5  
R6  
VIN3  
1.7V TO  
5.5V  
C7  
1µF  
C3  
1µF  
EN4  
ON  
VOUT4  
FB4  
V
AT  
EN4  
OUT4  
300mA  
OFF  
LDO2  
(DIGITAL)  
R7  
R8  
VIN4  
C8  
1µF  
C4  
1µF  
ADP5034  
AGND  
Figure 1.  
Rev. A  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2011 Analog Devices, Inc. All rights reserved.  
 
 

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