Datasheet > 8SLVP1212I

8SLVP1212I

更新时间： 2024-01-16 04:44:42

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
25页	881K
描述
Low Phase Noise, 1-to-12, 3.3V, 2.5V LVPECL Output Fanout Buffer

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8SLVP1212I 数据手册

Low Phase Noise, 1-to-12, 3.3V, 2.5V

LVPECL Output Fanout Buffer

IDT8SLVP1212I

DATASHEET

General Description

Features

The IDT8SLVP1212I is a high-performance, 12 output differential

LVPECL fanout buffer. The device is designed for the fanout of

high-frequency, very low additive phase-noise clock and data signals.

The IDT8SLVP1212I is characterized to operate from a 3.3V and

2.5V power supply. Guaranteed output-to-output and part-to-part

skew characteristics make the IDT8SLVP1212I ideal for those clock

distribution applications demanding well-defined performance and

repeatability. Two selectable differential inputs and twelve low skew

outputs are available. The integrated bias voltage generators enables

easy interfacing of single-ended signals to the device inputs. The

device is optimized for low power consumption and low additive

phase noise.

• Twelve low skew, low additive jitter LVPECL outputs

• Two selectable, differential clock inputs

• Differential pairs can accept the following differential input

levels: LVDS, LVPECL, CML

• Maximum input clock frequency: 2GHz

• LVCMOS interface levels for the control input (input select)

• Output skew: 33ps (maximum)

• Propagation delay: 550ps (maximum)

• Low additive phase jitter, RMS at f_REF= 156.25MHz, V_PP= 1V,

12kHz-20MHz: 60fs (maximum)

• Full 3.3V and 2.5V supply voltage

• Device current consumption (I_EE): 131mA (maximum)

• Available in Lead-free (RoHS 6), 40-Lead VFQFN package

• -40°C to 85°C ambient operating temperature

• Differential PCLK0, nPCLK0 and PCLK1, nPCLK1 pairs can also

accept single-ended LVCMOS levels. See Applications section

Wiring the Differential Input Levels to Accept Single-ended Levels

(Figure 1A and Figure 1B)

Block Diagram

nQ0

nQ1

Pin Assignment

nQ2

30 29 28 27 26 25 24 23 22 21

nQ3

Q8 32

nQ8 33

Q9 34

19 nQ3

18 Q3

17 nQ2

16 Q2

15 nQ1

14 Q1

13 nQ0

12 Q0

PCLK0

nPCLK0

nQ4

nQ9 35

Q10 36

nQ10 37

Q11 38

nQ11 39

nQ5

f_REF

nQ6

7 8 9 10

nQ7

PCLK1

nPCLK1

nQ8

SEL

IDT8SLVP1212I

40-lead VFQFN

6mm x 6mm x 0.925mm package body,

2.9mm x 2.9mm E-Pad size

NL Package, Top View

nQ9

Q10

nQ10

Voltage

Reference

V_REF

Q11

nQ11

IDT8SLVP1212ANLGI REVISION A JANUARY 28, 2014

12 3 4 5 6 7...25

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与8SLVP1212I相关器件

型号	品牌	获取价格	描述	数据表
8SLVP2102	IDT	获取价格	2.5V LVPECL Output Fanout Buffer
8SLVP2102ANLGI	IDT	获取价格	Low Phase Noise, Dual 1-to-2, 3.3V, 2.5V LVPECL Output Fanout Buffer
8SLVP2102ANLGI/W	IDT	获取价格	Low Phase Noise, Dual 1-to-2, 3.3V, 2.5V LVPECL Output Fanout Buffer
8SLVP2102ANLGI8	IDT	获取价格	Low Phase Noise, Dual 1-to-2, 3.3V, 2.5V LVPECL Output Fanout Buffer
8SLVP2102I	IDT	获取价格	Low Phase Noise, Dual 1-to-2, 3.3V, 2.5V LVPECL Output Fanout Buffer
8SLVP2102I	RENESAS	获取价格	Dual 1:2, 3.3V, 2.5V LVPECL Output Fanout Buffer
8SLVP2104I	RENESAS	获取价格	Dual 1:4, 3.3V, 2.5V LVPECL Output Fanout Buffer
8SLVP2106I	RENESAS	获取价格	Dual 1:6, 3.3V, 2.5V LVPECL Output Fanout Buffer
8SLVP2108	IDT	获取价格	Low Phase Noise, Dual 1-to-8, 3.3V, 2.5V LVPECL Output Fanout Buffer
8SLVP2108_16	IDT	获取价格	Low Phase Noise, Dual 1-to-8, 3.3V, 2.5V LVPECL Output Fanout Buffer

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