Low Phase Noise, Dual 1-to-2, 3.3V,
2.5V LVPECL Output Fanout Buffer
8SLVP2102
Datasheet
Description
Features
The 8SLVP2102 is a high-performance differential LVPECL fanout
buffer. The device is designed for the fanout of high-frequency, very
low additive phase-noise clock and data signals. The 8SLVP2102 is
characterized to operate from a 3.3V or 2.5V power supply.
Guaranteed output-to-output and part-to-part skew characteristics
make the 8SLVP2102 ideal for those clock distribution applications
demanding well-defined performance and repeatability.
• Two low skew, low additive jitter LVPECL output pairs
• Two selectable, differential clock input pairs
• Differential pairs can accept the following differential input
levels: LVDS, LVPECL, CML
• Maximum input clock frequency: 2GHz
• Output skew: 5ps (typical)
• Propagation delay: 225ps (maximum)
Two selectable differential inputs and four low skew outputs are
available. The integrated bias voltage reference enables easy
interfacing of single-ended signals to the device inputs. The device is
optimized for low power consumption and low additive phase noise.
• Low additive phase jitter, RMS, fREF = 156.25MHz, VPP = 1V,
12kHz – 20MHz: 36fs (maximum)
• Full 3.3V and 2.5V supply voltage
• Maximum device current consumption (IEE): 56mA (maximum)
• Available in lead-free (RoHS 6), 16-Lead VFQFPN package
• -40°C to 85°C ambient operating temperature
• Supports case temperature ≤105°C operations
• Accepts single-ended LVCMOS levels. See Applications section
• Differential PCLKA, nPCLKA and PCLKB, nPCLKB pairs can also
accept single-ended LVCMOS levels. See Applications section
Wiring the Differential Input Levels to Accept Single-ended Levels
(Figure 1A and Figure 1B)
Pin Assignment
Block Diagram
VCC
12 11 10
13
9
4
QA0
nQA0
8
7
6
VREF
QB0
nQB0
QB1
14
15
nPCLKA
PCLKA
VCC
PCLKA
nPCLKA
QA1
nQA1
16
5
nQB1
1
2
3
VCC
QB0
nQB0
8SLVP2102
16-Lead VFQFPN
3.0mm x 3.0mm x 0.925mm package body
PCLKB
nPCLKB
QB1
nQB1
NL Package
Top View
Voltage
VREF
Reference
©2018 Integrated Device Technology, Inc.
1
March 13, 2018