74VHCT257A

更新时间： 2024-11-22 22:56:27

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		复用器
页数	文件大小	规格书
10页	73K
描述
QUAD 2 CHANNEL MULTIPLEXER 3-STATE

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中文翻译

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数据手册

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74VHCT257A 数据手册

74VHCT257A

QUAD 2 CHANNEL MULTIPLEXER (3-STATE)

PRELIMINARY DATA

■

HIGH SPEED: t_PD=5.8 ns (TYP.)at V_CC=5V

LOWPOWER DISSIPATION:

I_CC= 4 µA (MAX.)at T_A=25 ^oC

COMPATIBLEWITH TTL OUTPUTS:

V_IH= 2V (MIN), V_IL=0.8V(MAX)

POWER DOWN PROTECTION ON INPUTS&

OUTPUTS

SYMMETRICALOUTPUT IMPEDANCE:

|I_OH| = I_OL=8 mA (MIN)

BALANCEDPROPAGATIONDELAYS:

t_PLHt_PHL

■

SOP

TSSOP

ORDER CODES

TUBE

PACKAGE

SOP

T & R

74VHCT257AM 74VHCT257AMTR

74VHCT257ATTR

TSSOP

OPERATINGVOLTAGERANGE:

V_CC(OPR)= 4.5Vto 5.5V

PIN AND FUNCTION COMPATIBLEWITH

74 SERIES257

The 74VHCT257A is a non inverting multiplexer.

When the ENABLE INPUT is held ”High”, all

outputs become high impedance state. If

SELECT INPUT is held ”Low”, ”A” data is

selected, when SELECT INPUT is ”High”, ”B”

data is chosen.

■

IMPROVEDLATCH-UP IMMUNITY

LOWNOISE:V_OLP=0.8V(Max.)

Power down protection is provided on all inputs

and output and 0 to 7V can be accepted on

inputs with no regard to the supply voltage. This

device can be used to interface 5V to 3V.

All inputs and outputs are equipped with

protection circuits against static discharge, giving

them 2KV ESD immunity and transient excess

voltage.

DESCRIPTION

The 74VHCT257A is an advanced high-speed

CMOS QUAD 2 CHANNEL MULTIPLEXER

(3-STATE) fabricated with sub-micron silicon gate

and

double-layer metal

wiring

C²MOS

technology.

It is composed of four independent 2 channel

multiplexers with common SELECT and ENABLE

INPUT.

PIN CONNECTION AND IEC LOGIC SYMBOLS

1/9

March 2000

12 3 4 5 6 7...10

中文翻译

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