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74VHCT257A PDF预览

74VHCT257A

更新时间: 2024-11-04 22:56:27
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 复用器
页数 文件大小 规格书
10页 73K
描述
QUAD 2 CHANNEL MULTIPLEXER 3-STATE

74VHCT257A 数据手册

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74VHCT257A  
QUAD 2 CHANNEL MULTIPLEXER (3-STATE)  
PRELIMINARY DATA  
HIGH SPEED: tPD =5.8 ns (TYP.)at VCC =5V  
LOWPOWER DISSIPATION:  
ICC = 4 µA (MAX.)at TA =25 oC  
COMPATIBLEWITH TTL OUTPUTS:  
VIH = 2V (MIN), VIL =0.8V(MAX)  
POWER DOWN PROTECTION ON INPUTS&  
OUTPUTS  
SYMMETRICALOUTPUT IMPEDANCE:  
|IOH| = IOL =8 mA (MIN)  
BALANCEDPROPAGATIONDELAYS:  
tPLH tPHL  
SOP  
TSSOP  
ORDER CODES  
TUBE  
PACKAGE  
SOP  
T & R  
74VHCT257AM 74VHCT257AMTR  
74VHCT257ATTR  
TSSOP  
OPERATINGVOLTAGERANGE:  
VCC (OPR)= 4.5Vto 5.5V  
PIN AND FUNCTION COMPATIBLEWITH  
74 SERIES257  
The 74VHCT257A is a non inverting multiplexer.  
When the ENABLE INPUT is held ”High”, all  
outputs become high impedance state. If  
SELECT INPUT is held ”Low”, ”A” data is  
selected, when SELECT INPUT is ”High”, ”B”  
data is chosen.  
IMPROVEDLATCH-UP IMMUNITY  
LOWNOISE:VOLP =0.8V(Max.)  
Power down protection is provided on all inputs  
and output and 0 to 7V can be accepted on  
inputs with no regard to the supply voltage. This  
device can be used to interface 5V to 3V.  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
voltage.  
DESCRIPTION  
The 74VHCT257A is an advanced high-speed  
CMOS QUAD 2 CHANNEL MULTIPLEXER  
(3-STATE) fabricated with sub-micron silicon gate  
and  
double-layer metal  
wiring  
C2MOS  
technology.  
It is composed of four independent 2 channel  
multiplexers with common SELECT and ENABLE  
INPUT.  
PIN CONNECTION AND IEC LOGIC SYMBOLS  
1/9  
March 2000  

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