Datasheet > 74VHCT257A_04

74VHCT257A_04

更新时间： 2024-09-15 05:05:55

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		复用器
页数	文件大小	规格书
13页	314K
描述
QUAD 2 CHANNEL MULTIPLEXER (3-STATE)

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中文翻译

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数据手册

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74VHCT257A_04 数据手册

74VHCT257A

QUAD 2 CHANNEL MULTIPLEXER (3-STATE)

■

HIGH SPEED: t = 4.8 ns (TYP.) at V = 5V

PD CC

LOW POWER DISSIPATION:

= 4 µA (MAX.) at T =25°C

■

COMPATIBLE WITH TTL OUTPUTS:

= 2V (MIN.), V = 0.8V (MAX)

POWER DOWN PROTECTION ON INPUTS

& OUTPUTS

SOP

TSSOP

T & R

SYMMETRICAL OUTPUT IMPEDANCE:

|I | = I = 8 mA (MIN)

Table 1: Order Codes

PACKAGE

BALANCED PROPAGATION DELAYS:

PLH

PHL

OPERATING VOLTAGE RANGE:

(OPR) = 4.5V to 5.5V

SOP

74VHCT257AMTR

74VHCT257ATTR

TSSOP

PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 257

■

IMPROVED LATCH-UP IMMUNITY

If SELECT INPUT is held "Low", "A" data is

selected, when SELECT INPUT is "High", "B" data

is chosen.

LOW NOISE: V

= 0.8V (MAX.)

OLP

Power down protection is provided on all inputs

and outputs and 0 to 7V can be accepted on

inputs with no regard to the supply voltage. This

device can be used to interface 5V to 3V since all

inputs are equipped with TTL threshold.

All inputs and outputs are equipped with

protection circuits against static discharge, giving

them 2KV ESD immunity and transient excess

voltage.

DESCRIPTION

The 74VHCT257A is an advanced high-speed

CMOS QUAD 2-CHANNEL MULTIPLEXER

(3-STATE) fabricated with sub-micron silicon gate

and double-layer metal wiring C MOS technology.

It is composed of four independent 2-channel

multiplexers with common SELECT and ENABLE

INPUT(OE). The VHCT257A is a non-inverting

multiplexer. When the ENABLE INPUT is held

"High", all outputs become high impedance state.

Figure 1: Pin Connection And IEC Logic Symbols

Rev. 3

1/13

December 2004

12 3 4 5 6 7...13

中文翻译

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