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74VHC123AN

更新时间： 2024-11-03 22:56:23
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 振荡器逻辑集成电路光电二极管时钟
页数 文件大小 规格书
9页 110K
描述
Dual Retriggerable Monostable Multivibrator

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中文翻译

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74VHC123AN 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：DIP包装说明：DIP, DIP16,.3
针数：16Reach Compliance Code：compliant
HTS代码：8542.39.00.01风险等级：5.8
其他特性：RETRIGGERABLE系列：AHC/VHC
JESD-30 代码：R-PDIP-T16长度：19.305 mm
负载电容（CL）：50 pF逻辑集成电路类型：MONOSTABLE MULTIVIBRATOR
数据/时钟输入次数：2功能数量：2
端子数量：16最高工作温度：85 °C
最低工作温度：-40 °C输出极性：COMPLEMENTARY
封装主体材料：PLASTIC/EPOXY封装代码：DIP
封装等效代码：DIP16,.3封装形状：RECTANGULAR
封装形式：IN-LINE峰值回流温度（摄氏度）：NOT SPECIFIED
电源：2/5.5 V传播延迟（tpd）：27.5 ns
认证状态：Not Qualified座面最大高度：5.08 mm
子类别：Prescaler/Multivibrators最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：2 V标称供电电压 (Vsup)：3.3 V
表面贴装：NO技术：CMOS
温度等级：INDUSTRIAL端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：7.62 mm

74VHC123AN 数据手册

 浏览型号74VHC123AN的Datasheet PDF文件第2页浏览型号74VHC123AN的Datasheet PDF文件第3页浏览型号74VHC123AN的Datasheet PDF文件第4页浏览型号74VHC123AN的Datasheet PDF文件第5页浏览型号74VHC123AN的Datasheet PDF文件第6页浏览型号74VHC123AN的Datasheet PDF文件第7页 
July 1993  
Revised April 1999  
74VHC123A  
Dual Retriggerable Monostable Multivibrator  
An input protection circuit ensures that 0 to 7V can be  
applied to the input pins without regard to the supply volt-  
age. This device can be used to interface 5V to 3V systems  
and two supply systems such as battery back up. This cir-  
cuit prevents device destruction due to mismatched supply  
and input voltages.  
General Description  
The VHC123A is an advanced high speed CMOS  
Monostable Multivibrator fabricated with silicon gate CMOS  
technology. It achieves the high speed operation similar to  
equivalent Bipolar Schottky TTL while maintaining the  
CMOS low power dissipation. Each multivibrator features  
both a negative, A, and a positive, B, transition triggered  
input, either of which can be used as an inhibit input. Also  
included is a clear input that when taken low resets the  
one-shot. The VHC123A can be triggered on the positive  
transition of the clear while A is held low and B is held high.  
The output pulse width is determined by the equation:  
PW = (Rx)(Cx); where PW is in seconds, R is in ohms, and  
Features  
■ High Speed:  
t
PD = 8.1 ns (typ) at TA = 25°C  
■ Low Power Dissipation:  
CC = 4 µA (Max) at TA = 25°C  
I
C is in farads.  
■ Active State: ICC = 600 µA (Max) at TA = 25°C  
Limits for Rx and Cx are:  
■ High Noise Immunity: VNIH = VNIL = 28% VCC (min)  
External capacitor, Cx No limit  
■ Power down protection is provided on all inputs  
■ Pin and function compatible with 74HC123A  
External resistors, Rx  
CC > 3.0V, 1 kΩ min  
VCC = 2.0V, 5 kΩ min  
V
Ordering Code:  
Order Number Package Number  
Package Description  
74VHC123AM  
74VHC123ASJ  
74VHC123AMTC  
74VHC123AN  
M16A  
M16D  
MTC16  
N16E  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide  
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Logic Symbol  
Connection Diagram  
IEEE/IEC  
© 1999 Fairchild Semiconductor Corporation  
DS011621.prf  
www.fairchildsemi.com  
1234567...9

中文翻译

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74VHC123AN 替代型号

型号 品牌 替代类型 描述 数据表
MC14538BCPG ONSEMI

功能相似

 Dual Precision Retriggerable/Resettable Monostable Multivibrator
MC14538BCP ONSEMI

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 Dual Precision Retiggerable/Resettable Monostable Multivibrator

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74VHC125 STMICROELECTRONICS

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74VHC125 NEXPERIA

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74VHC125_04 FAIRCHILD

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74VHC125_07 FAIRCHILD

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 		Quad Buffer with 3-STATE Outputs
74VHC125BQ NEXPERIA

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 		Quad buffer/line driver; 3-state
74VHC125D NEXPERIA

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