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74VHC125FT PDF预览

74VHC125FT

更新时间: 2024-11-05 14:56:55
品牌 Logo 应用领域
东芝 - TOSHIBA 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
8页 182K
描述
Quad Buffer, TSSOP14B

74VHC125FT 技术参数

是否Rohs认证: 符合生命周期:Active
零件包装代码:TSSOP包装说明:TSSOP,
针数:14Reach Compliance Code:compliant
HTS代码:8542.39.00.01Factory Lead Time:12 weeks
风险等级:1.55系列:AHC/VHC/H/U/V
JESD-30 代码:R-PDSO-G14长度:5 mm
逻辑集成电路类型:BUS DRIVER位数:1
功能数量:4端口数量:2
端子数量:14最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):NOT SPECIFIED
传播延迟(tpd):13 ns座面最大高度:1.2 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:4.4 mmBase Number Matches:1

74VHC125FT 数据手册

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74VHC125FT,74VHC126FT  
CMOS Digital Integrated Circuits Silicon Monolithic  
74VHC125FT,74VHC126FT  
1. Functional Description  
Quad Bus Buffer, Non-Inverted 3-State Outputs  
74VHC125FT: Quad Bus Buffer  
74VHC126FT: Quad Bus Buffer  
2. General  
The 74VHC125FT,74VHC126FT are high speed CMOS QUAD BUS BUFFERs fabricated with silicon gate  
C2MOS technology.  
They achieve the high speed operation similar to equivalent Bipolar Shottky TTL while maintaining the CMOS  
low power dissipation.  
The 74VHC125FT requires the 3-state control input G to be set high to place the output into the high impedance  
state, whereas the 74VHC126FT requires the control input G to be set low to place the output into high impedance.  
An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply  
voltage. This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up.  
This circuit prevents device destruction due to mismatched supply and input voltages.  
3. Features  
(1) AEC-Q100 (Rev. H) (Note 1)  
(2) Wide operating temperature: Topr = -40 to 125  
(3) High speed: Propagation delay time = 3.8 ns (typ.) at VCC = 5 V  
(4) Low power dissipation: ICC = 4.0 µA (max) at Ta = 25   
(5) High noise immunity: VNIH = VNIL = 28 % VCC (min)  
(6) Power down protection is provided on all inputs.  
(7) Balanced propagation delays: tPLH tPHL  
(8) Wide operating voltage range: VCC(opr) = 2.0 V to 5.5 V  
(9) Low noise: VOLP = 0.8 V (max)  
(10) Pin and function compatible with 74 series (AC/HC/AHC/LV etc.) 125 or 126 type.  
Note 1: This device is compliant with the reliability requirements of AEC-Q100. For details, contact your Toshiba sales  
representative.  
4. Packaging  
TSSOP14B  
Start of commercial production  
2013-06  
©2016 Toshiba Corporation  
2016-08-18  
Rev.4.0  
1

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