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74V1T14_04 PDF预览

74V1T14_04

更新时间: 2024-11-04 04:01:11
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS /
页数 文件大小 规格书
9页 111K
描述
SINGLE SCHMITT INVERTER

74V1T14_04 数据手册

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74V1T14  
SINGLE SCHMITT INVERTER  
HIGH SPEED: t = 5.0ns (TYP.) at V = 5V  
PD CC  
LOW POWER DISSIPATION:  
I
= 1µA(MAX.) at T =25°C  
CC  
A
TYPICAL HYSTERESIS:  
V =700mV at V =4.5V  
h
CC  
POWER DOWN PROTECTION ON INPUT  
SYMMETRICAL OUTPUT IMPEDANCE:  
SOT23-5L  
SOT323-5L  
T & R  
|I | = I = 8mA (MIN) at V = 4.5V  
OH  
OL  
CC  
BALANCED PROPAGATION DELAYS:  
t
t
ORDER CODES  
PLH  
PHL  
OPERATING VOLTAGE RANGE:  
(OPR) = 4.5V to 5.5V  
PACKAGE  
V
CC  
SOT23-5L  
74V1T14STR  
74V1T14CTR  
IMPROVED LATCH-UP IMMUNITY  
SOT323-5L  
DESCRIPTION  
The 74V1T14 is an advanced high-speed CMOS  
SINGLE SCHMITT INVERTER fabricated with  
sub-micron silicon gate and double-layer metal  
interface 5V to 3V. Pin configuration and function  
are the same as those of the 74V1T04 but the  
74V1T14 has hysteresis.  
This together with its schmitt trigger function  
allows it to be used on line receivers with slow  
rise/fall input signals.  
The input is equipped with protection circuits  
against static discharge, giving it ESD immunity  
and transient excess voltage.  
2
wiring C MOS technology.  
The internal circuit is composed of 3 stages  
including buffer output, which provide high noise  
immunity and stable output.  
Power down protection is provided on input and 0  
to 7V can be accepted on input with no regard to  
the supply voltage. This device can be used to  
PIN CONNECTION AND IEC LOGIC SYMBOLS  
April 2004  
1/9  

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