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74LVX574SJ PDF预览

74LVX574SJ

更新时间: 2024-11-13 22:53:19
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 总线驱动器总线收发器触发器逻辑集成电路光电二极管
页数 文件大小 规格书
6页 83K
描述
Low Voltage Octal D-Type Flip-Flop with 3-STATE Outputs

74LVX574SJ 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:5.30 MM, LEAD FREE, EIAJ TYPE2, SOP-20
针数:20Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.2
Is Samacsys:N系列:LV/LV-A/LVX/H
JESD-30 代码:R-PDSO-G20JESD-609代码:e3
长度:12.6 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大频率@ Nom-Sup:45000000 Hz
最大I(ol):0.004 A湿度敏感等级:1
位数:8功能数量:1
端口数量:2端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP20,.3封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
电源:3.3 V传播延迟(tpd):21 ns
认证状态:Not Qualified座面最大高度:2.1 mm
子类别:FF/Latches最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):2.7 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:5.3 mm
Base Number Matches:1

74LVX574SJ 数据手册

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June 1993  
Revised March 1999  
74LVX574  
Low Voltage Octal D-Type Flip-Flop with  
3-STATE Outputs  
age. The inputs tolerate up to 7V allowing interface of 5V  
systems to 3V systems.  
General Description  
The LVX574 is a high-speed octal D-type flip-flop which is  
controlled by an edge-triggered clock input (CP) and a buff-  
ered common Output Enable (OE) input. When the OE  
input is HIGH, the eight outputs are in a high impedance  
state. The LVX574 is functionally identical to the LVX374  
but with inputs and outputs on opposite sides of the pack-  
Features  
Input voltage translation from 5V to 3V  
Ideal for low power/low noise 3.3V applications  
Guaranteed simultaneous switching noise level and  
dynamic threshold performance  
Ordering Code:  
Order Number Package Number  
Package Description  
74LVX574M  
M20B  
M20D  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
74LVX574SJ  
74LVX574MTC  
MTC20  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Logic Symbol  
Connection Diagram  
Pin Descriptions  
Pin Names  
D0–D7  
Description  
Data Inputs  
CP  
Clock Pulse Input  
OE  
3-STATE Output Enable Input  
3-STATE Outputs  
O0–O7  
© 1999 Fairchild Semiconductor Corporation  
DS500050.prf  
www.fairchildsemi.com  

74LVX574SJ 替代型号

型号 品牌 替代类型 描述 数据表
74LVX574SJX FAIRCHILD

完全替代

Octal D-Type Flip-Flop
SN74LV574ANSRG4 TI

类似代替

LV/LV-A/LVX/H SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, GREEN, PLASTIC, SOP-20
SN74LV574ANS TI

类似代替

OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

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