74LVX74MSCX

更新时间： 2024-11-14 13:04:59

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		触发器
页数	文件大小	规格书
7页	96K
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数据手册

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74LVX74MSCX 数据手册

May 1993

Revised February 2005

74LVX74

Low Voltage Dual D-Type Positive Edge-Triggered

Flip-Flop

Asynchronous Inputs:

General Description

The LVX74 is a dual D-type flip-flop with Asynchronous

LOW input to S_D(Set) sets Q to HIGH level

LOW input to C_D(Clear) sets Q to LOW level

Clear and Set inputs and complementary (Q, Q) outputs.

Information at the input is transferred to the outputs on the

positive edge of the clock pulse. After the Clock Pulse input

threshold voltage has been passed, the Data input is

locked out and information present will not be transferred to

the outputs until the next rising edge of the Clock Pulse

input.

Clear and Set are independent of clock

Simultaneous LOW on C_Dand S_Dmakes both Q and Q

HIGH

Features

■ Input voltage level translation from 5V to 3V

■ Ideal for low power/low noise 3.3V applications

■ Guaranteed simultaneous switching noise level and

dynamic threshold performance

Ordering Code:

Package

Order Number

Package Description

Number

74LVX74M

M14A

M14D

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

74LVX74SJ

74LVX74MTC

MTC14

74LVX74MTCX_NL

(Note 1)

Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm

Wide

Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Pb-Free package per JEDEC J-STD-020B.

Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.

Connection Diagram

Pin Descriptions

Pin Names

D₁, D₂

Description

Data Inputs

CP₁, CP₂

C_D1, C_D2

Clock Pulse Inputs

Direct Clear Inputs

Direct Set Inputs

Outputs

S_D1, S_D2

Q₁, Q₁, Q₂, Q₂

DS011606

www.fairchildsemi.com

12 3 4 5 6 7

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与74LVX74MSCX相关器件

型号	品牌	获取价格	描述	数据表
74LVX74MTC	FAIRCHILD	获取价格	Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop
74LVX74MTC	ONSEMI	获取价格	低压双 D 型上升沿触发的触发器
74LVX74MTC_08	FAIRCHILD	获取价格	Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop
74LVX74MTCX	FAIRCHILD	获取价格	Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop
74LVX74MTCX	ONSEMI	获取价格	低压双 D 型上升沿触发的触发器
74LVX74MTCX_NL	FAIRCHILD	获取价格	D Flip-Flop, LV/LV-A/LVX/H Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary O
74LVX74MTR	STMICROELECTRONICS	获取价格	LOW VOLTAGE CMOS DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR (5V TOLERANT INPUTS)
74LVX74MX	ONSEMI	获取价格	低压双 D 型上升沿触发的触发器
74LVX74MX_NL	FAIRCHILD	获取价格	D Flip-Flop, LV/LV-A/LVX/H Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary O
74LVX74SJ	FAIRCHILD	获取价格	Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop