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74LVQ299M PDF预览

74LVQ299M

更新时间: 2024-11-18 13:01:47
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 移位寄存器
页数 文件大小 规格书
15页 460K
描述
LVQ SERIES, 8-BIT BIDIRECTIONAL PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO20, SOP-20

74LVQ299M 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP-20
针数:20Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.84
计数方向:BIDIRECTIONAL系列:LVQ
JESD-30 代码:R-PDSO-G20JESD-609代码:e4
长度:12.8 mm逻辑集成电路类型:PARALLEL IN PARALLEL OUT
最大频率@ Nom-Sup:80000000 Hz位数:8
功能数量:1端子数量:20
最高工作温度:125 °C最低工作温度:-55 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP20,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE电源:3.3 V
传播延迟(tpd):20 ns认证状态:Not Qualified
座面最大高度:2.65 mm子类别:Shift Registers
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):2.7 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
触发器类型:POSITIVE EDGE宽度:7.5 mm
最小 fmax:80 MHzBase Number Matches:1

74LVQ299M 数据手册

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74LVQ299  
8 BIT PIPO SHIFT REGISTER  
WITH ASYNCHRONOUS CLEAR  
HIGH SPEED:  
= 8.3 ns (TYP.) at V = 3.3 V  
t
PD  
CC  
COMPATIBLE WITH TTL OUTPUTS  
LOW POWER DISSIPATION:  
I
= 4 µA (MAX.) at T =25°C  
CC  
A
LOW NOISE:  
= 0.5V (TYP.) at V = 3.3V  
SOP  
TSSOP  
V
OLP  
CC  
75TRANSMISSION LINE DRIVING  
CAPABILITY  
Table 1: Order Codes  
PACKAGE  
SYMMETRICAL OUTPUT IMPEDANCE:  
T & R  
|I | = I = 12mA (MIN) at V = 3.0 V  
OH  
OL  
CC  
SOP  
74LVQ299MTR  
74LVQ299TTR  
PCI BUS LEVELS GUARANTEED AT 24 mA  
BALANCED PROPAGATION DELAYS:  
TSSOP  
t
t
PLH  
PHL  
These devices have four modes (HOLD, SHIFT  
LEFT, SHIFT RIGHT and LOAD DATA). Each  
mode is chosen by two function select inputs (S0,  
S1) as shown in the Truth Table.  
When one or both enable inputs, (G1, G2) are  
high, the eight input/output terminals are in the  
high impedance state; however sequential  
operation or clearing of the register is not affected.  
Clear function is asynchronous to clock.  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
voltage.  
OPERATING VOLTAGE RANGE:  
(OPR) = 2V to 3.6V (1.2V Data Retention)  
V
CC  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 299  
IMPROVED LATCH-UP IMMUNITY  
DESCRIPTION  
The 74LVQ299 is a low voltage CMOS 8 BIT  
PIPO SHIFT REGISTER (3-STATE) fabricated  
with sub-micron silicon gate and double-layer  
metal wiring C MOS technology. It is ideal for low  
power and low noise 3.3V applications.  
2
Figure 1: Pin Connection And IEC Logic Symbols  
Rev. 2  
1/15  
July 2004  

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