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74LVC3G06GT,115 PDF预览

74LVC3G06GT,115

更新时间: 2024-09-29 15:26:39
品牌 Logo 应用领域
恩智浦 - NXP 光电二极管逻辑集成电路
页数 文件大小 规格书
21页 279K
描述
74LVC3G06 - Triple inverter with open-drain output SON 8-Pin

74LVC3G06GT,115 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:SON包装说明:1 X 1.95 MM, 0.50 MM HEIGHT, PLASTIC, MO-252, SOT833-1, SON-8
针数:8Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.55
系列:LVC/LCX/ZJESD-30 代码:R-PDSO-N8
JESD-609代码:e3长度:1.95 mm
负载电容(CL):50 pF逻辑集成电路类型:INVERTER
最大I(ol):0.024 A湿度敏感等级:1
功能数量:3输入次数:1
端子数量:8最高工作温度:125 °C
最低工作温度:-40 °C输出特性:OPEN-DRAIN
封装主体材料:PLASTIC/EPOXY封装代码:VSON
封装等效代码:SOLCC8,.04,20封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, VERY THIN PROFILE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:3.3 V
Prop。Delay @ Nom-Sup:4.3 ns传播延迟(tpd):8.2 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:0.5 mm子类别:Gates
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):1.8 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Tin (Sn)端子形式:NO LEAD
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:1 mm
Base Number Matches:1

74LVC3G06GT,115 数据手册

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74LVC3G06  
Triple inverter with open-drain output  
Rev. 11 — 28 March 2013  
Product data sheet  
1. General description  
The 74LVC3G06 provides three inverting buffers.  
The output of this device is an open drain and can be connected to other open-drain  
outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions.  
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this  
device in a mixed 3.3 V and 5 V environment.  
Schmitt trigger action at all inputs makes the circuit tolerant for slower input rise and fall  
time.  
This device is fully specified for partial power-down applications using IOFF. The IOFF  
circuitry disables the output, preventing a damaging backflow current through the device  
when it is powered down.  
2. Features and benefits  
Wide supply voltage range from 1.65 V to 5.5 V  
5 V tolerant input/output for interfacing with 5 V logic  
High noise immunity  
Complies with JEDEC standard:  
JESD8-7 (1.65 V to 1.95 V)  
JESD8-5 (2.3 V to 2.7 V)  
JESD8-B/JESD36 (2.7 V to 3.6 V)  
ESD protection:  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V  
24 mA output drive (VCC = 3.0 V)  
CMOS low power consumption  
Latch-up performance exceeds 250 mA  
Direct interface with TTL levels  
Inputs accept voltages up to 5 V  
Multiple package options  
Specified from 40 C to +85 C and 40 C to +125 C  
 
 

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