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74LVC3G07DC,125 PDF预览

74LVC3G07DC,125

更新时间: 2024-02-18 21:15:25
品牌 Logo 应用领域
恩智浦 - NXP 光电二极管逻辑集成电路触发器
页数 文件大小 规格书
21页 284K
描述
74LVC3G07 - Triple buffer with open-drain output SSOP 8-Pin

74LVC3G07DC,125 技术参数

是否Rohs认证: 符合生命周期:Active
零件包装代码:SSOP包装说明:VSSOP,
针数:8Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:0.92
Samacsys Description:74LVC3G07 - Triple buffer with open-drain output@en-us系列:LVC/LCX/Z
JESD-30 代码:R-PDSO-G8JESD-609代码:e4
长度:2.3 mm逻辑集成电路类型:BUFFER
湿度敏感等级:1功能数量:3
输入次数:1端子数量:8
最高工作温度:125 °C最低工作温度:-40 °C
输出特性:OPEN-DRAIN封装主体材料:PLASTIC/EPOXY
封装代码:VSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
传播延迟(tpd):8.4 ns认证状态:Not Qualified
座面最大高度:1 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):1.65 V标称供电电压 (Vsup):1.8 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:2 mm

74LVC3G07DC,125 数据手册

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74LVC3G07  
Triple buffer with open-drain output  
Rev. 11 — 9 April 2013  
Product data sheet  
1. General description  
The 74LVC3G07 provides three non-inverting buffers.  
The output of the device is an open-drain and can be connected to other open-drain  
outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions.  
Input can be driven from either 3.3 V or 5 V devices. This feature allows the use of this  
device in a mixed 3.3 V and 5 V environment.  
Schmitt trigger action at all inputs makes the circuit tolerant for slower input rise and fall  
time.  
This device is fully specified for partial power-down applications using IOFF. The IOFF  
circuitry disables the output, preventing the damaging backflow current through the device  
when it is powered down.  
2. Features and benefits  
Wide supply voltage range from 1.65 V to 5.5 V  
5 V tolerant input/output for interfacing with 5 V logic  
High noise immunity  
Complies with JEDEC standard:  
JESD8-7 (1.65 V to 1.95 V)  
JESD8-5 (2.3 V to 2.7 V)  
JESD8-B/JESD36 (2.7 V to 3.6 V).  
ESD protection:  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V  
24 mA output drive (VCC = 3.0 V)  
CMOS low power consumption  
Latch-up performance exceeds 250 mA  
Direct interface with TTL levels  
Inputs accept voltages up to 5 V  
Multiple package options  
Specified from 40 C to +85 C and 40 C to +125 C.  
 
 

74LVC3G07DC,125 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVC3G07DCUTG4 TI

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TRIPLE BUFFER / DRIVER WITH OPEN DRAIN OUTPUTS
SN74LVC3G07DCUTE4 TI

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TRIPLE BUFFER / DRIVER WITH OPEN DRAIN OUTPUTS
SN74LVC3G07DCURE4 TI

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TRIPLE BUFFER / DRIVER WITH OPEN DRAIN OUTPUTS

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