Datasheet > 74LVC3G07DC-Q100

74LVC3G07DC-Q100

更新时间： 2023-09-03 20:27:51

品牌	Logo	应用领域
安世 - NEXPERIA		光电二极管逻辑集成电路
页数	文件大小	规格书
11页	196K
描述
Triple buffer with open-drain outputProduction

阅读下载

中文翻译

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

74LVC3G07DC-Q100 技术参数

是否Rohs认证：	符合	生命周期：	Transferred
零件包装代码：	SSOP	包装说明：	2.30 MM, PLASTIC, MO-187, SOT765-1, VSSOP-8
针数：	8	Reach Compliance Code：	compliant
风险等级：	5.77	Base Number Matches：	1

74LVC3G07DC-Q100 数据手册

74LVC3G07-Q100

Triple buffer with open-drain output

Rev. 3 — 23 October 2018

Product data sheet

1. General description

The 74LVC3G07-Q100 provides three non-inverting buffers.

The output of the device is an open-drain and can be connected to other open-drain outputs to

implement active-LOW wired-OR or active-HIGH wired-AND functions.

Input can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a

mixed 3.3 V and 5 V environment.

Schmitt trigger action at all inputs makes the circuit tolerant for slower input rise and fall time.

This device is fully specified for partial power-down applications using I_OFF. The I_OFFcircuitry

disables the output, preventing the damaging backflow current through the device when it is

powered down.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100

(Grade 1) and is suitable for use in automotive applications.

2. Features and benefits

•

Automotive product qualification in accordance with AEC-Q100 (Grade 1)

Specified from -40 °C to +85 °C and from -40 °C to +125 °C

•

Wide supply voltage range from 1.65 V to 5.5 V

5 V tolerant input/output for interfacing with 5 V logic

High noise immunity

Complies with JEDEC standard:

•

JESD8-7 (1.65 V to 1.95 V)

JESD8-5 (2.3 V to 2.7 V)

JESD8-B/JESD36 (2.7 V to 3.6 V).

•

-24 mA output drive (V_CC= 3.0 V)

CMOS low power consumption

Latch-up performance exceeds 250 mA

Direct interface with TTL levels

Inputs accept voltages up to 5 V

ESD protection:

•

MIL-STD-883, method 3015 exceeds 2000 V

HBM JESD22-A114F exceeds 2000 V

MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)

12 3 4 5 6 7...11

中文翻译

下载PDF

与74LVC3G07DC-Q100相关器件

型号	品牌	获取价格	描述	数据表
74LVC3G07DP	NXP	获取价格	Triple buffer with open-drain output
74LVC3G07DP	NEXPERIA	获取价格	Triple buffer with open-drain outputProduction
74LVC3G07DP,125	NXP	获取价格	74LVC3G07 - Triple buffer with open-drain output TSSOP 8-Pin
74LVC3G07DP-G	NXP	获取价格	Triple buffer with open-drain output - Description: Triple Buffer With Open-Drain Outputs
74LVC3G07DP-Q100	NXP	获取价格	LVC/LCX/Z SERIES, TRIPLE 1-INPUT NON-INVERT GATE, PDSO8, 3 MM, PLASTIC, SOT505-2, TSSOP-8
74LVC3G07DP-Q100	NEXPERIA	获取价格	Triple buffer with open-drain outputProduction
74LVC3G07DP-Q100,125	NXP	获取价格	Buffer, LVC/LCX/Z Series, 3-Func, 1-Input, CMOS, PDSO8
74LVC3G07GD	NXP	获取价格	Triple buffer with open-drain output
74LVC3G07GM	NXP	获取价格	Triple buffer with open-drain output
74LVC3G07GM,115	NXP	获取价格	74LVC3G07 - Triple buffer with open-drain output QFN 8-Pin