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74LVC2G126DP,125 PDF预览

74LVC2G126DP,125

更新时间: 2024-02-28 20:25:44
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
22页 284K
描述
74LVC2G126 - Dual bus buffer/line driver; 3-state TSSOP 8-Pin

74LVC2G126DP,125 技术参数

Source Url Status Check Date:2013-06-14 00:00:00是否Rohs认证: 符合
生命周期:Transferred零件包装代码:TSSOP
包装说明:3 MM, PLASTIC, SOT505-2, TSSOP-8针数:8
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:7.93控制类型:ENABLE HIGH
系列:LVC/LCX/ZJESD-30 代码:S-PDSO-G8
JESD-609代码:e4长度:3 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.024 A湿度敏感等级:1
位数:1功能数量:2
端口数量:2端子数量:8
最高工作温度:125 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP8,.16封装形状:SQUARE
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TAPE AND REEL
电源:3.3 VProp。Delay @ Nom-Sup:5.4 ns
传播延迟(tpd):12.3 ns认证状态:Not Qualified
座面最大高度:1.1 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
宽度:3 mmBase Number Matches:1

74LVC2G126DP,125 数据手册

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74LVC2G126  
Dual bus buffer/line driver; 3-state  
Rev. 12 — 8 April 2013  
Product data sheet  
1. General description  
The 74LVC2G126 is a dual non-inverting buffer/line driver with 3-state outputs. Each  
3-state output is controlled by an output enable input (pin nOE). A LOW-level at pin nOE  
causes the output to assume a high-impedance OFF-state. Schmitt trigger action at all  
inputs makes the circuit highly tolerant of slower input rise and fall times.  
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of the  
74LVC2G126 as a translator in a mixed 3.3 V and 5 V environment.  
It is fully specified for partial power-down applications using IOFF. The IOFF circuitry  
disables the output, preventing a damaging backflow current through the device when it is  
powered down.  
2. Features and benefits  
Wide supply voltage range from 1.65 V to 5.5 V  
5 V tolerant input/output for interfacing with 5 V logic  
High noise immunity  
Complies with JEDEC standard:  
JESD8-7 (1.65 V to 1.95 V)  
JESD8-5 (2.3 V to 2.7 V)  
JESD8-B/JESD36 (2.7 V to 3.6 V)  
ESD protection:  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V  
24 mA output drive (VCC = 3.0 V)  
CMOS low power consumption  
Latch-up performance exceeds 250 mA  
Direct interface with TTL levels  
Inputs accept voltages up to 5 V  
Multiple package options  
Specified from 40 C to +85 C and 40 C to +125 C  
 
 

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