5秒后页面跳转
74LVC2G126GD PDF预览

74LVC2G126GD

更新时间: 2024-11-19 06:31:55
品牌 Logo 应用领域
恩智浦 - NXP 驱动器
页数 文件大小 规格书
17页 412K
描述
Dual bus buffer/line driver; 3-state

74LVC2G126GD 技术参数

Source Url Status Check Date:2013-06-14 00:00:00是否无铅: 不含铅
是否Rohs认证: 符合生命周期:Transferred
零件包装代码:SON包装说明:3 X 2 MM, 0.50 MM HEIGHT, 0.50 MM PITCH, PLASTIC, SOT996-2, SON-8
针数:8Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.21
控制类型:ENABLE HIGH系列:LVC/LCX/Z
JESD-30 代码:R-PDSO-N8JESD-609代码:e4
长度:3 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.024 A
湿度敏感等级:1位数:1
功能数量:2端口数量:2
端子数量:8最高工作温度:125 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:VSON封装等效代码:SOLCC8,.11,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, VERY THIN PROFILE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:3.3 VProp。Delay @ Nom-Sup:5.4 ns
传播延迟(tpd):12.3 ns认证状态:Not Qualified
座面最大高度:0.5 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:NICKEL PALLADIUM GOLD端子形式:NO LEAD
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:2 mm
Base Number Matches:1

74LVC2G126GD 数据手册

 浏览型号74LVC2G126GD的Datasheet PDF文件第2页浏览型号74LVC2G126GD的Datasheet PDF文件第3页浏览型号74LVC2G126GD的Datasheet PDF文件第4页浏览型号74LVC2G126GD的Datasheet PDF文件第5页浏览型号74LVC2G126GD的Datasheet PDF文件第6页浏览型号74LVC2G126GD的Datasheet PDF文件第7页 
74LVC2G126  
Dual bus buffer/line driver; 3-state  
Rev. 08 — 5 May 2008  
Product data sheet  
1. General description  
The 74LVC2G126 is a dual non-inverting buffer/line driver with 3-state outputs. Each  
3-state output is controlled by an output enable input (pin nOE). A LOW-level at pin nOE  
causes the output to assume a high-impedance OFF-state. Schmitt trigger action at all  
inputs makes the circuit highly tolerant of slower input rise and fall times.  
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of the  
74LVC2G126 as a translator in a mixed 3.3 V and 5 V environment.  
It is fully specified for partial power-down applications using IOFF. The IOFF circuitry  
disables the output, preventing a damaging backflow current through the device when it is  
powered down.  
2. Features  
I Wide supply voltage range from 1.65 V to 5.5 V  
I 5 V tolerant input/output for interfacing with 5 V logic  
I High noise immunity  
I Complies with JEDEC standard:  
N JESD8-7 (1.65 V to 1.95 V)  
N JESD8-5 (2.3 V to 2.7 V)  
N JESD8-B/JESD36 (2.7 V to 3.6 V)  
I ESD protection:  
N HBM JESD22-A114E exceeds 2000 V  
N MM JESD22-A115-A exceeds 200 V  
I ±24 mA output drive (VCC = 3.0 V)  
I CMOS low power consumption  
I Latch-up performance exceeds 250 mA  
I Direct interface with TTL levels  
I Inputs accept voltages up to 5 V  
I Multiple package options  
I Specified from 40 °C to +85 °C and 40 °C to +125 °C  

与74LVC2G126GD相关器件

型号 品牌 获取价格 描述 数据表
74LVC2G126GD-G NXP

获取价格

IC,BUFFER/DRIVER,SINGLE,2-BIT,LCX/LVC-CMOS,LLCC,8PIN,PLASTIC
74LVC2G126GF NXP

获取价格

Dual bus buffer/line driver; 3-state
74LVC2G126GM NXP

获取价格

Dual bus buffer/line driver; 3-state
74LVC2G126GM PHILIPS

获取价格

Bus Driver, 1-Func, 2-Bit, True Output, CMOS, PDSO8
74LVC2G126GM-G NXP

获取价格

暂无描述
74LVC2G126GN NXP

获取价格

Dual bus buffer/line driver; 3-state
74LVC2G126GN NEXPERIA

获取价格

Dual bus buffer/line driver; 3-stateProduction
74LVC2G126GN/S500X NXP

获取价格

LVC/LCX/Z SERIES, DUAL 1-BIT DRIVER, TRUE OUTPUT, PDSO8
74LVC2G126GS NXP

获取价格

Dual bus buffer/line driver; 3-state
74LVC2G126GS NEXPERIA

获取价格

Dual bus buffer/line driver; 3-stateProduction