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74LVC1G157GV-Q100 PDF预览

74LVC1G157GV-Q100

更新时间: 2024-11-19 02:56:59
品牌 Logo 应用领域
安世 - NEXPERIA 光电二极管逻辑集成电路
页数 文件大小 规格书
12页 200K
描述
Single 2-input multiplexer

74LVC1G157GV-Q100 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:TSOP,Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.57
系列:LVC/LCX/ZJESD-30 代码:R-PDSO-G6
长度:2.9 mm逻辑集成电路类型:MULTIPLEXER
湿度敏感等级:1功能数量:1
输入次数:2输出次数:1
端子数量:6最高工作温度:125 °C
最低工作温度:-40 °C输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE
峰值回流温度(摄氏度):260传播延迟(tpd):13 ns
筛选级别:AEC-Q100座面最大高度:1.1 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):1.8 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Pure Tin (Sn)端子形式:GULL WING
端子节距:0.95 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:1.5 mm
Base Number Matches:1

74LVC1G157GV-Q100 数据手册

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74LVC1G157-Q100  
Single 2-input multiplexer  
Rev. 3 — 8 October 2019  
Product data sheet  
1. General description  
The 74LVC1G157-Q100 is a single 2-input multiplexer which select data from two data inputs  
(I0 and I1) under control of a common data select input (S). The state of the common data select  
input determines the particular register from which the data comes. The output (Y) presents the  
selected data in the true (non-inverted) form.  
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices  
as translators in mixed 3.3 V and 5 V applications.  
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry  
disables the output, preventing the damaging backflow current through the device when it is  
powered down.  
Schmitt-trigger action at all inputs makes the circuit highly tolerant to slower input rise  
and fall times.  
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100  
(Grade 1) and is suitable for use in automotive applications.  
2. Features and benefits  
Automotive product qualification in accordance with AEC-Q100 (Grade 1)  
Specified from -40 °C to +85 °C and from -40 °C to +125 °C  
Wide supply voltage range from 1.65 V to 5.5 V  
High noise immunity  
Complies with JEDEC standard:  
JESD8-7 (1.65 V to 1.95 V)  
JESD8-5 (2.3 V to 2.7 V)  
JESD8B/JESD36 (2.7 V to 3.6 V)  
±24 mA output drive (VCC = 3.0 V)  
CMOS low power consumption  
Latch-up performance exceeds 250 mA  
Direct interface with TTL levels  
Inputs accept voltages up to 5 V  
ESD protection:  
MIL-STD-883, method 3015 exceeds 2000 V  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)  
 
 

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