生命周期: | Obsolete | 零件包装代码: | DIP |
包装说明: | DIP, | 针数: | 14 |
Reach Compliance Code: | unknown | HTS代码: | 8542.39.00.01 |
风险等级: | 5.37 | 系列: | LS |
JESD-30 代码: | R-PDIP-T14 | 逻辑集成电路类型: | J-K FLIP-FLOP |
位数: | 2 | 功能数量: | 2 |
端子数量: | 14 | 最高工作温度: | 70 °C |
最低工作温度: | 输出极性: | COMPLEMENTARY | |
封装主体材料: | PLASTIC/EPOXY | 封装代码: | DIP |
封装形状: | RECTANGULAR | 封装形式: | IN-LINE |
传播延迟(tpd): | 30 ns | 认证状态: | Not Qualified |
最大供电电压 (Vsup): | 5.25 V | 最小供电电压 (Vsup): | 4.75 V |
标称供电电压 (Vsup): | 5 V | 表面贴装: | NO |
技术: | TTL | 温度等级: | COMMERCIAL |
端子形式: | THROUGH-HOLE | 端子位置: | DUAL |
触发器类型: | NEGATIVE EDGE | 最小 fmax: | 30 MHz |
Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
74LS73NA+1 | RAYTHEON |
获取价格 |
J-K Flip-Flop, 2-Func, Negative Edge Triggered, TTL, PDIP14, | |
74LS73PC | FAIRCHILD |
获取价格 |
J-K Flip-Flop, LS Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, TT | |
74LS74 | NSC |
获取价格 |
Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs | |
74LS74 | MOTOROLA |
获取价格 |
DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP | |
74LS74 | ONSEMI |
获取价格 |
LOW POWER SCHOTTKY | |
74LS74 | FAIRCHILD |
获取价格 |
Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs | |
74LS74 | HITACHI |
获取价格 |
Dual D-type Positive Edge-triggered Flip-Flops(With Preset and Clear) | |
74LS74A | TI |
获取价格 |
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR | |
74LS74ADC | ROCHESTER |
获取价格 |
D Flip-Flop | |
74LS74ADCQR | FAIRCHILD |
获取价格 |
D Flip-Flop, 2-Func, Positive Edge Triggered, TTL, CDIP14, |