5秒后页面跳转
74LS74 PDF预览

74LS74

更新时间: 2024-11-16 22:53:19
品牌 Logo 应用领域
美国国家半导体 - NSC 触发器
页数 文件大小 规格书
6页 139K
描述
Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs

74LS74 数据手册

 浏览型号74LS74的Datasheet PDF文件第2页浏览型号74LS74的Datasheet PDF文件第3页浏览型号74LS74的Datasheet PDF文件第4页浏览型号74LS74的Datasheet PDF文件第5页浏览型号74LS74的Datasheet PDF文件第6页 
June 1989  
54LS74/DM54LS74A/DM74LS74A  
Dual Positive-Edge-Triggered D Flip-Flops  
with Preset, Clear and Complementary Outputs  
General Description  
This device contains two independent positive-edge-trig-  
gered D flip-flops with complementary outputs. The informa-  
tion on the D input is accepted by the flip-flops on the posi-  
tive going edge of the clock pulse. The triggering occurs at a  
voltage level and is not directly related to the transition time  
of the rising edge of the clock. The data on the D input may  
be changed while the clock is low or high without affecting  
the outputs as long as the data setup and hold times are not  
violated. A low logic level on the preset or clear inputs will  
set or reset the outputs regardless of the logic levels of the  
other inputs.  
Features  
Y
Alternate military/aerospace device (54LS74) is avail-  
able. Contact a National Semiconductor Sales Office/  
Distributor for specifications.  
Connection Diagram  
Dual-In-Line Package  
TL/F/6373–1  
Order Number 54LS74DMQB, 54LS74FMQB, 54LS74LMQB,  
DM54LS74AJ, DM54LS74AW, DM74LS74AM or DM74LS74AN  
See NS Package Number E20A, J14A, M14A, N14A or W14B  
Function Table  
Inputs  
CLR  
Outputs  
PR  
CLK  
D
Q
Q
L
H
L
H
L
X
X
X
X
X
H
L
H
L
L
H
L
X
H*  
H
H*  
L
H
H
H
H
H
H
u
u
L
L
H
X
Q
0
Q
0
e
e
e
H
X
L
High Logic Level  
Either Low or High Logic Level  
Low Logic Level  
e
Positive-going Transition  
u
*
e
This configuration is nonstable; that is, it will not persist when either the preset  
and/or clear inputs return to their inactive (high) level.  
e
Q
The output logic level of Q before the indicated input conditions were established.  
0
C
1995 National Semiconductor Corporation  
TL/F/6373  
RRD-B30M105/Printed in U. S. A.  

与74LS74相关器件

型号 品牌 获取价格 描述 数据表
74LS74A TI

获取价格

DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR
74LS74ADC ROCHESTER

获取价格

D Flip-Flop
74LS74ADCQR FAIRCHILD

获取价格

D Flip-Flop, 2-Func, Positive Edge Triggered, TTL, CDIP14,
74LS74AN NXP

获取价格

IC LS SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP14, PLAS
74LS74APC ETC

获取价格

Dual D-Type Flip-Flop
74LS74APCQM FAIRCHILD

获取价格

D Flip-Flop, 2-Func, Positive Edge Triggered, TTL, PDIP14,
74LS74APCQM ROCHESTER

获取价格

D Flip-Flop
74LS74APCQR FAIRCHILD

获取价格

D Flip-Flop, 2-Func, Positive Edge Triggered, TTL, PDIP14,
74LS74APCQR ROCHESTER

获取价格

D Flip-Flop
74LS74ASC ROCHESTER

获取价格

D Flip-Flop