Datasheet > 74LCX652M1R

74LCX652M1R

更新时间： 2024-11-06 23:24:19

品牌	Logo	应用领域
其他 - ETC		总线收发器触发器逻辑集成电路光电二极管
页数	文件大小	规格书
13页	97K
描述
BUS TRANSCEIVER\|SINGLE\|8-BIT\|LCX-CMOS\|SOP\|24PIN\|PLASTIC

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中文翻译

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数据手册

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74LCX652M1R 数据手册

74LCX652

LOW VOLT. CMOS OCTAL BUS TRANSCEIVER/REGISTER

WITH 5 VOLT TOLERANT INPUTS AND OUTPUTS(3-STATE)

■

5V TOLERANT INPUTS AND OUTPUTS

HIGH SPEED :

■

= 7.0 ns (MAX.) at V = 3V

POWER DOWN PROTECTION ON INPUTS

AND OUTPUTS

SYMMETRICAL OUTPUT IMPEDANCE:

|I | = I = 24mA (MIN) at V = 3V

SOP

TSSOP

■

PCI BUS LEVELS GUARANTEED AT 24 mA

BALANCED PROPAGATION DELAYS:

ORDER CODES

PACKAGE

PLH

PHL

TUBE

T & R

■

OPERATING VOLTAGE RANGE:

(OPR) = 2.0V to 3.6V (1.5V Data

SOP

74LCX652M1R

74LCX652RM13TR

74LCX652TTR

TSSOP

Retention)

■

PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 652

This device consists of bus transceiver circuits

with 3 state, D-type flip-flops, and control circuitry

arranged for multiplexed transmission of data

directly from the input bus or from the internal

storage registers. Enable (GAB) and (GBA) pins

are provided to control the transceiver functions.

Select AB and Select BA control pins are provided

to select whether real-time or stored data is

transferred. A low input level selects real-time,

and a high selects stored data.

Data on the A or B bus, or both, can be stored in

the internal D flip-flop by low to high transitions at

the appropriate clock pins (CAB or CBA)

regardless of the select or enable control pins.

When select AB and select BA are in the real-time

transfer mode, it is also possible to store data

LATCH-UP PERFORMANCE EXCEEDS

500mA (JESD 17)

ESD PERFORMANCE:

HBM > 2000V (MIL STD 883 method 3015);

MM > 200V

DESCRIPTION

The 74LCX652 is a low voltage CMOS OCTAL

BUS

(3-STATE) fabricated with sub-micron silicon gate

and double-layer metal wiring C MOS technology.

It is ideal for low power and high speed 3.3V

applications; it can be interfaced to 5V signal

environment for both inputs and outputs.

TRANSCEIVER

AND

PIN CONNECTION AND IEC LOGIC SYMBOLS

September 2001

1/13

12 3 4 5 6 7...13

中文翻译

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