Datasheet > 74LCX74_08

74LCX74_08

更新时间： 2024-11-30 12:26:59

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		触发器
页数	文件大小	规格书
13页	826K
描述
74LCX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs

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74LCX74_08 数据手册

March 2008

74LCX74

Low Voltage Dual D-Type Positive Edge-Triggered

Flip-Flop with 5V Tolerant Inputs

Features

General Description

■ 5V tolerant inputs

The LCX74 is a dual D-type flip-flop with Asynchronous

Clear and Set inputs and complementary (Q, Q) outputs.

Information at the input is transferred to the outputs on

the positive edge of the clock pulse. After the Clock

Pulse input threshold voltage has been passed, the Data

input is locked out and information present will not be

transferred to the outputs until the next rising edge of the

Clock Pulse input.

■ 2.3V–3.6V V specifications provided

■ 7.0ns t max. (V = 3.3V), 10µA I max.

■ Power down high impedance inputs and outputs

24mA output drive (V = 3.0V)

■

■ Implements proprietary noise/EMI reduction circuitry

■ Latch-up performance exceeds JEDEC 78 conditions

■ ESD performance:

Asynchronous Inputs:

– Human body model > 2000V

■ LOW input to S (Set) sets Q to HIGH level

– Machine model > 200V

■ LOW input to C (Clear) sets Q to LOW level

■ Leadless Pb-Free DQFN package

■ Clear and Set are independent of clock

■ Simultaneous LOW on C and S makes both Q

and Q HIGH

Ordering Information

Package

Order Number

Number

Package Description

74LCX74M

M14A

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150"

Narrow

74LCX74SJ

M14D

14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

(1)

74LCX74BQX

MLP14A

14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN),

JEDEC MO-241, 2.5 x 3.0mm

74LCX74MTC

MTC14

14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,

4.4mm Wide

Note:

1. DQFN package available in Tape and Reel only.

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.

All packages are lead free per JEDEC: J-STD-020B standard.

74LCX74 Rev. 1.7.0

www.fairchildsemi.com

12 3 4 5 6 7...13

中文翻译

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与74LCX74_08相关器件

型号	品牌	获取价格	描述	数据表
74LCX74BQX	FAIRCHILD	获取价格	Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs
74LCX74BQX	ONSEMI	获取价格	低压双通道D型正边沿触发式触发器，带5V容差输入
74LCX74FT	TOSHIBA	获取价格	CMOS Logic ICs - 74LCX Series
74LCX74M	FAIRCHILD	获取价格	Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs
74LCX74M	ONSEMI	获取价格	低压双通道D型正边沿触发式触发器，带5V容差输入
74LCX74MTC	FAIRCHILD	获取价格	Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs
74LCX74MTC	ONSEMI	获取价格	低压双通道D型正边沿触发式触发器，带5V容差输入
74LCX74MTC_NL	FAIRCHILD	获取价格	D Flip-Flop, LVC/LCX/Z Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary Outpu
74LCX74MTCX	FAIRCHILD	获取价格	74LCX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs
74LCX74MTCX	ONSEMI	获取价格	低压双通道D型正边沿触发式触发器，带5V容差输入

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