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74LCX760MTCX_NL PDF预览

74LCX760MTCX_NL

更新时间: 2024-11-18 13:04:59
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 驱动器
页数 文件大小 规格书
10页 101K
描述
Bus Driver, LVC/LCX/Z Series, 1-Func, 8-Bit, True Output, CMOS, PDSO20, 4.40 MM, LEAD FREE, MO-153, TSSOP-20

74LCX760MTCX_NL 技术参数

生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP,针数:20
Reach Compliance Code:unknown风险等级:5.72
Is Samacsys:N系列:LVC/LCX/Z
JESD-30 代码:R-PDSO-G20JESD-609代码:e3/e4
长度:6.5 mm逻辑集成电路类型:BUS DRIVER
位数:8功能数量:1
端口数量:2端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:OPEN-DRAIN输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
传播延迟(tpd):10 ns认证状态:Not Qualified
座面最大高度:1.2 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):2.5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:MATTE TIN/NICKEL PALLADIUM GOLD
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL宽度:4.4 mm
Base Number Matches:1

74LCX760MTCX_NL 数据手册

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July 2001  
Revised February 2002  
74LCX760  
Low Voltage Buffer/Line Driver  
with 5V Tolerant Inputs and Open Drain Outputs  
General Description  
Features  
Open drain version of the LCX244  
The LCX760 is the Open Drain version of the LCX244. The  
LCX760 contains eight non-inverting buffers with 3-STATE  
outputs. The device may be employed as a memory  
address driver, clock driver and bus-oriented transmitter/  
receiver. The LCX760 is designed for low voltage (2.5V or  
3.3V) VCC applications with capability of interfacing to a 5V  
5V tolerant inputs and outputs  
2.3V–3.6V VCC specifications provided  
8.0 ns tPD max (VCC = 3.3V), 10 µA ICC max  
Power down high impedance inputs and outputs  
Supports live insertion/withdrawal (Note 1)  
24 mA output drive (VCC = 3.0V)  
signal environment.  
The LCX760 is fabricated with an advanced CMOS tech-  
nology to achieve high speed operation while maintaining  
CMOS low power dissipation.  
Implements patented noise/EMI reduction circuitry  
Latch-up conforms to JEDEC JED78  
ESD performance:  
Human body model > 2000V  
Machine model > 200V  
Note 1: To ensure the high-impedance state during power up or down, OE  
should be tied to VCC through a pull-up resistor: the minimum value or the  
resistor is determined by the current-sourcing capability of the driver.  
Ordering Code:  
Order Number Package Number  
Package Description  
74LCX760WM  
74LCX760SJ  
M20B  
M20D  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300Wide  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 4.4mm Wide  
74LCX760MSA  
74LCX760MTC  
MSA20  
MTC20  
20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter Xto the ordering code.  
Logic Symbol  
Connection Diagram  
IEEE/IEC  
© 2002 Fairchild Semiconductor Corporation  
DS500413  
www.fairchildsemi.com  

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