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74LCX760_05 PDF预览

74LCX760_05

更新时间: 2024-11-18 04:47:47
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 驱动器
页数 文件大小 规格书
10页 112K
描述
Low Voltage Buffer/Line Driver with 5V Tolerant Inputs and Open Drain Outputs

74LCX760_05 数据手册

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July 2001  
Revised March 2005  
74LCX760  
Low Voltage Buffer/Line Driver  
with 5V Tolerant Inputs and Open Drain Outputs  
General Description  
Features  
Open drain version of the LCX244  
The LCX760 is the Open Drain version of the LCX244. The  
LCX760 contains eight non-inverting buffers with 3-STATE  
outputs. The device may be employed as a memory  
address driver, clock driver and bus-oriented transmitter/  
receiver. The LCX760 is designed for low voltage (2.5V or  
3.3V) VCC applications with capability of interfacing to a 5V  
5V tolerant inputs and outputs  
2.3V–3.6V VCC specifications provided  
8.0 ns tPD max (VCC 3.3V), 10 A ICC max  
Power down high impedance inputs and outputs  
Supports live insertion/withdrawal (Note 1)  
24 mA output drive (VCC 3.0V)  
signal environment.  
The LCX760 is fabricated with an advanced CMOS tech-  
nology to achieve high speed operation while maintaining  
CMOS low power dissipation.  
Implements patented noise/EMI reduction circuitry  
Latch-up conforms to JEDEC JED78  
ESD performance:  
Human body model 2000V  
Machine model 200V  
Note 1: To ensure the high-impedance state during power up or down, OE  
should be tied to V  
through a pull-up resistor: the minimum value or the  
CC  
resistor is determined by the current-sourcing capability of the driver.  
Ordering Code:  
Order Number Package Number  
Package Description  
74LCX760WM  
74LCX760SJ  
M20B  
M20D  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
74LCX760MSA  
74LCX760MTC  
MSA20  
MTC20  
Devices also available in Tape and Reel. Specify by appending the suffix letter Xto the ordering code.  
Pb-Free package per JEDEC J-STD-020B.  
Logic Symbol  
Connection Diagram  
IEEE/IEC  
© 2005 Fairchild Semiconductor Corporation  
DS500413  
www.fairchildsemi.com  

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