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74LCX821MSA PDF预览

74LCX821MSA

更新时间: 2024-11-17 22:56:19
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 触发器
页数 文件大小 规格书
8页 93K
描述
Low Voltage 10-Bit D-Type Flip-Flop with 5V Tolerant Inputs and Outputs

74LCX821MSA 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SSOP
包装说明:SSOP, SSOP24,.3针数:24
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.22
系列:LVC/LCX/ZJESD-30 代码:R-PDSO-G24
JESD-609代码:e3长度:8.2 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大频率@ Nom-Sup:150000000 Hz最大I(ol):0.024 A
湿度敏感等级:1位数:10
功能数量:1端口数量:2
端子数量:24最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装等效代码:SSOP24,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
包装方法:RAIL峰值回流温度(摄氏度):260
电源:3.3 VProp。Delay @ Nom-Sup:7 ns
传播延迟(tpd):8.4 ns认证状态:Not Qualified
座面最大高度:2 mm子类别:FF/Latches
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:5.3 mmBase Number Matches:1

74LCX821MSA 数据手册

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January 1996  
Revised March 2001  
74LCX821  
Low Voltage 10-Bit D-Type Flip-Flop  
with 5V Tolerant Inputs and Outputs  
General Description  
The LCX821 consists of ten D-type Flip-Flops with  
3-STATE outputs for bus organized system applications.  
The device is designed for low voltage (2.5V or 3.3V) VCC  
Features  
5V tolerant inputs and outputs  
2.3V–3.6V VCC specifications provided  
7.0 ns tPD max (VCC = 3.3V), 10 µA ICC max  
applications with capability of interfacing to a 5V signal  
environment.  
Power-down high impedance inputs and outputs  
Supports live insertion/withdrawal (Note 1)  
±24 mA output drive (VCC = 3.0V)  
The LCX821 is fabricated with an advanced CMOS tech-  
nology to achieve high speed operation while maintaining  
CMOS low power dissipation.  
Implements patented noise/EMI reduction circuitry  
Latch-up performance exceeds 500 mA  
ESD performance:  
Human Body Model > 2000V  
Machine Model > 200V  
Note 1: To ensure the high-impedance state during power up or down, OE  
should be tied to VCC through a pull-up resistor: the minimum value or the  
resistor is determined by the current-sourcing capability of the driver.  
Ordering Code:  
Order Number Package Number  
Package Description  
74LCX821WM  
74LCX821MSA  
74LCX821MTC  
M24B  
MSA24  
MTC24  
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide  
24-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide  
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
Devices also available in Tape and Reel. Specify by appending the suffix Xto the ordering code.  
Logic Symbols  
Connection Diagram  
IEEE/IEC  
© 2001 Fairchild Semiconductor Corporation  
DS012635  
www.fairchildsemi.com  

74LCX821MSA 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVC821APWR TI

功能相似

10-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74LVC821APW TI

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10-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74LVC821ADW TI

功能相似

10-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS

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