Datasheet > 74LCX652WMX

74LCX652WMX

更新时间： 2024-11-19 23:24:19

品牌	Logo	应用领域
其他 - ETC		总线收发器触发器逻辑集成电路光电二极管输出元件
页数	文件大小	规格书
10页	108K
描述
Single 8-bit Bus Transceiver

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数据手册

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74LCX652WMX 数据手册

February 1994

Revised March 2001

74LCX652

Low Voltage Transceiver/Register

with 5V Tolerant Inputs and Outputs

General Description

Features

■ 5V tolerant inputs and outputs

The LCX652 consists of bus transceiver circuits with D-

type flip-flops, and control circuitry arranged for multiplexed

transmission of data directly from the input bus or from

internal registers. Data on the A or B bus will be clocked

into the registers as the appropriate clock pin goes to the

HIGH logic level. Output Enable pins (OEAB, OEBA) are

provided to control the transceiver function.

■ 2.3V − 3.6V V_CCspecifications provided

■ 7.0 ns t_PDmax (V_CC= 3.3V), 10 µA I_CCmax

■ Power down high impedance inputs and outputs

■ Supports live insertion/withdrawal (Note 1)

■ ±24 mA output drive (V_CC= 3.0V)

The LCX652 is designed for low voltage (2.5V or 3.3V) V_CC

■ Implements patented noise/EMI reduction circuitry

■ Latch-up performance exceeds 500 mA

■ ESD performance:

applications with capability of interfacing to a 5V signal

environment.

The LCX652 is fabricated with an advanced CMOS tech-

nology to achieve high speed operation while maintaining

CMOS low power dissipation.

Human body model > 2000V

Machine model > 200V

Note 1: To ensure the high-impedance state during power up or down, OE

should be tied to V_CCthrough a pull-up resistor: the minimum value or the

resistor is determined by the current-sourcing capability of the driver.

Ordering Code:

Order Number Package Number

Package Description

74LCX652WM

74LCX652MSA

74LCX652MTC

M24B

MSA24

MTC24

24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide

24-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide

24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram

Pin Descriptions

Pin Names

A₀–A₇, B₀–B₇

CPAB, CPBA

SAB, SBA

Description

A and B Inputs/3-STATE Outputs

Clock Inputs

Select Inputs

OEAB, OEBA

Output Enable Inputs

DS011998

www.fairchildsemi.com

12 3 4 5 6 7...10

中文翻译

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与74LCX652WMX相关器件

型号	品牌	获取价格	描述	数据表
74LCX74	FAIRCHILD	获取价格	Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs
74LCX74	STMICROELECTRONICS	获取价格	Low voltage CMOS dual D-Type Flip Flop with 5V tolerant inputs
74LCX74_06	STMICROELECTRONICS	获取价格	Low voltage CMOS dual D-Type Flip Flop with 5V tolerant inputs
74LCX74_08	FAIRCHILD	获取价格	74LCX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs
74LCX74BQX	FAIRCHILD	获取价格	Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs
74LCX74BQX	ONSEMI	获取价格	低压双通道D型正边沿触发式触发器，带5V容差输入
74LCX74FT	TOSHIBA	获取价格	CMOS Logic ICs - 74LCX Series
74LCX74M	FAIRCHILD	获取价格	Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs
74LCX74M	ONSEMI	获取价格	低压双通道D型正边沿触发式触发器，带5V容差输入
74LCX74MTC	FAIRCHILD	获取价格	Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs

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