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74LCX652WM PDF预览

74LCX652WM

更新时间: 2024-11-06 22:56:19
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 总线驱动器总线收发器触发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
10页 97K
描述
Low Voltage Transceiver/Register with 5V Tolerant Inputs and Outputs

74LCX652WM 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:0.300 INCH, MS-013, SOIC-24针数:24
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.16
Is Samacsys:N其他特性:WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
控制类型:INDEPENDENT CONTROL计数方向:BIDIRECTIONAL
系列:LVC/LCX/ZJESD-30 代码:R-PDSO-G24
JESD-609代码:e3长度:15.4 mm
负载电容(CL):50 pF逻辑集成电路类型:REGISTERED BUS TRANSCEIVER
最大I(ol):0.024 A湿度敏感等级:1
位数:8功能数量:1
端口数量:2端子数量:24
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP24,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:RAIL
峰值回流温度(摄氏度):260电源:3.3 V
Prop。Delay @ Nom-Sup:7 ns传播延迟(tpd):10.5 ns
认证状态:Not Qualified座面最大高度:2.65 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):2.5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
翻译:N/A触发器类型:POSITIVE EDGE
宽度:7.5 mmBase Number Matches:1

74LCX652WM 数据手册

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February 1994  
Revised April 1999  
74LCX652  
Low Voltage Transceiver/Register with 5V Tolerant  
Inputs and Outputs  
General Description  
Features  
5V tolerant inputs and outputs  
The LCX652 consists of bus transceiver circuits with D-  
type flip-flops, and control circuitry arranged for multiplexed  
transmission of data directly from the input bus or from  
internal registers. Data on the A or B bus will be clocked  
into the registers as the appropriate clock pin goes to the  
HIGH logic level. Output Enable pins (OEAB, OEBA) are  
provided to control the transceiver function.  
2.3V 3.6V VCC specifications provided  
7.0 ns tPD max (VCC = 3.3V), 10 µA ICC max  
Power down high impedance inputs and outputs  
Supports live insertion/withdrawal (Note 1)  
±24 mA output drive (VCC = 3.0V)  
The LCX652 is designed for low voltage (2.5V or 3.3V) VCC  
Implements patented noise/EMI reduction circuitry  
Latch-up performance exceeds 500 mA  
ESD performance:  
applications with capability of interfacing to a 5V signal  
environment.  
The LCX652 is fabricated with an advanced CMOS tech-  
nology to achieve high speed operation while maintaining  
CMOS low power dissipation.  
Human body model > 2000V  
Machine model > 200V  
Note 1: To ensure the high-impedance state during power up or down, OE  
should be tied to V  
through a pull-up resistor: the minimum value or the  
CC  
resistor is determined by the current-sourcing capability of the driver.  
Ordering Code:  
Order Number Package Number  
Package Description  
74LCX652WM  
74LCX652MSA  
74LCX652MTC  
M24B  
MSA24  
MTC24  
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide  
24-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide  
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagram  
Pin Descriptions  
Pin Names  
A0–A7, B0–B7  
CPAB, CPBA  
SAB, SBA  
Description  
A and B Inputs/3-STATE Outputs  
Clock Inputs  
Select Inputs  
OEAB, OEBA  
Output Enable Inputs  
© 1999 Fairchild Semiconductor Corporation  
DS011998.prf  
www.fairchildsemi.com  

74LCX652WM 替代型号

型号 品牌 替代类型 描述 数据表
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