是否Rohs认证: | 符合 | 生命周期: | Transferred |
包装说明: | TSSOP, TSSOP14,.25 | Reach Compliance Code: | unknown |
风险等级: | 5.7 | JESD-30 代码: | R-PDSO-G14 |
负载电容(CL): | 50 pF | 逻辑集成电路类型: | J-K FLIP-FLOP |
最大频率@ Nom-Sup: | 20000000 Hz | 最大I(ol): | 0.004 A |
功能数量: | 2 | 端子数量: | 14 |
最高工作温度: | 125 °C | 最低工作温度: | -40 °C |
封装主体材料: | PLASTIC/EPOXY | 封装代码: | TSSOP |
封装等效代码: | TSSOP14,.25 | 封装形状: | RECTANGULAR |
封装形式: | SMALL OUTLINE, THIN PROFILE, SHRINK PITCH | 电源: | 2/6 V |
认证状态: | Not Qualified | 子类别: | FF/Latches |
表面贴装: | YES | 技术: | CMOS |
温度等级: | AUTOMOTIVE | 端子形式: | GULL WING |
端子节距: | 0.635 mm | 端子位置: | DUAL |
触发器类型: | NEGATIVE EDGE | Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
74HC73PW-T | NXP |
获取价格 |
IC HC/UH SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14, | |
74HC73U | NXP |
获取价格 |
IC HC/UH SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, UUC, DI | |
74HC74 | ONSEMI |
获取价格 |
Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS | |
74HC74 | NXP |
获取价格 |
Dual D-type flip-flop with set and reset; positive-edge trigger | |
74HC74 | HGSEMI |
获取价格 |
具有清零和预置端的双路负边沿触发式 D 型触发器 | |
74HC7403 | NXP |
获取价格 |
4-Bit x 64-word FIFO register; 3-state | |
74HC7403D | NXP |
获取价格 |
4-Bit x 64-word FIFO register; 3-state | |
74HC7403D | PHILIPS |
获取价格 |
FIFO, 64X4, 98ns, Asynchronous, CMOS, PDSO16 | |
74HC7403D,512 | NXP |
获取价格 |
74HC(T)7403 - 4-Bit x 64-word FIFO register; 3-state SOP 16-Pin | |
74HC7403D,518 | NXP |
获取价格 |
74HC(T)7403 - 4-Bit x 64-word FIFO register; 3-state SOP 16-Pin |