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74HC4024DB,118 PDF预览

74HC4024DB,118

更新时间: 2024-11-18 14:49:15
品牌 Logo 应用领域
恩智浦 - NXP 光电二极管逻辑集成电路触发器
页数 文件大小 规格书
19页 190K
描述
74HC4024 - 7-stage binary ripple counter SSOP1 14-Pin

74HC4024DB,118 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SSOP1包装说明:SSOP, SSOP14,.3
针数:14Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.75
计数方向:UP系列:HC/UH
JESD-30 代码:R-PDSO-G14JESD-609代码:e4
长度:6.2 mm负载电容(CL):50 pF
负载/预设输入:NO逻辑集成电路类型:BINARY COUNTER
最大频率@ Nom-Sup:20000000 Hz最大I(ol):0.004 A
工作模式:ASYNCHRONOUS湿度敏感等级:1
位数:7功能数量:1
端子数量:14最高工作温度:125 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装等效代码:SSOP14,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:2/6 V传播延迟(tpd):265 ns
认证状态:Not Qualified座面最大高度:2 mm
子类别:Counters最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
触发器类型:NEGATIVE EDGE宽度:5.3 mm
最小 fmax:24 MHzBase Number Matches:1

74HC4024DB,118 数据手册

 浏览型号74HC4024DB,118的Datasheet PDF文件第2页浏览型号74HC4024DB,118的Datasheet PDF文件第3页浏览型号74HC4024DB,118的Datasheet PDF文件第4页浏览型号74HC4024DB,118的Datasheet PDF文件第5页浏览型号74HC4024DB,118的Datasheet PDF文件第6页浏览型号74HC4024DB,118的Datasheet PDF文件第7页 
74HC4024  
7-stage binary ripple counter  
Rev. 7 — 31 October 2013  
Product data sheet  
1. General description  
The 74HC4024 is a 7-stage binary ripple counter with a clock input (CP), an overriding  
asynchronous master reset input (MR) and seven fully buffered parallel outputs (Q0 to  
Q6). The counter advances on the HIGH-to-LOW transition of CP. A HIGH on MR clears  
all counter stages and forces all outputs LOW, independent of the state of CP. Each  
counter stage is a static toggle flip-flop. Schmitt-trigger action in the clock input makes the  
circuit highly tolerant to slower clock rise and fall times. Inputs include clamp diodes. This  
enables the use of current limiting resistors to interface inputs to voltages in excess of  
VCC  
.
2. Features and benefits  
Low-power dissipation  
Complies with JEDEC standard no. 7A  
ESD protection:  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V.  
Multiple package options  
Specified from 40 C to +80 C and from 40 C to +125 C.  
3. Applications  
Frequency dividing circuits  
Time delay circuits.  
 
 
 

74HC4024DB,118 替代型号

型号 品牌 替代类型 描述 数据表
74HC4024D,653 NXP

完全替代

74HC4024 - 7-stage binary ripple counter SOIC 14-Pin
74HC4024D,652 NXP

完全替代

74HC4024 - 7-stage binary ripple counter SOIC 14-Pin

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